
CPU, ADDRESSING MODES AND INSTRUCTION SET
12-6
12.3.1.2
Arithmetic Operations
This group of instructions supports arithmetic operations on a variety of operands. 8 and 16-bit
operations are supported directly and can easily be extended to support multiple word operands.
Twos complement (signed) and binary (unsigned) operations are supported directly. BCD arithmetic
is supported by following normal arithmetic instruction sequences with the decimal adjust accumulator
A (DAA) instruction to restore results to BCD format. Compare instructions perform a subtraction
within the CPU to update the condition code bits without altering either operand. Test instructions
are provided but are seldom needed since almost all other operations automatically update the
condition code bits anyway.
Table 12-2. Arithmetic Operations
Function
Mnemonic
IMM
DIR
EXT
INDX
INDY
INH
Add Accumulators
ABA
X
Add Accumulator B to X
ABX
X
Add Accumulator B to Y
ABY
X
Add with Carry to A
ADCA
XXXXX
Add with Carry to B
ADCB
XXXXX
Add Memory to A
ADDA
XXXXX
Add Memory to B
ADDB
XXXXX
Add Memory to D (16-bit
ADDD
XXXXX
Compare A to B
CBA
X
Compare A to Memory
CMPA
XXXXX
Compare B to Memory
CMPB
XXXXX
Compare D to Memory (16-bit
CPD
XXXXX
Decimal Adjust A (for BCD
DAA
X
Decrement Memory Byte
DEC
X
Decrement Accumulator A
DECA
X
Decrement Accumulator B
DECB
X
Increment Memory Byte
INC
X
Increment Accumulator A
INCA
X
Increment Accumulator B
INCB
X
Twos Complement Memory Byte
NEG
X
Twos Complement Accumulator A
NEGA
X
Twos Complement Accumulator B
NEGB
X
Subtract with Carry from A
SBCA
XXXXX
Subtract with Carry from B
SBCB
XXXXX
Subtract Memory from A
SUBA
XXXXX
Subtract Memory From B
SUBB
XXXXX
Subtract Memory From D (16-bit
SUBD
XXXXX
Test Memory for Zero or Minus
TST
XXX
Test A for Zero or Minus
TSTA
X
Test B for Zero or Minus
TSTB
X
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