參數(shù)資料
型號: MC68HC05V7CFNR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 40/170頁
文件大?。?/td> 589K
代理商: MC68HC05V7CFNR2
MOTOROLA
SECTION 15: MESSAGE DATA LINK CONTROLLER
Page 120
MC68HC05V7 Specification Rev. 1.0
15.5.4.7
Invalid Active Bit
If the active to passive transition beginning the next data bit or symbol occurs between the
passive to active transition beginning the current data bit or symbol and
a, the current bit
would be invalid. See Figure 15-14(1).
15.5.4.8
Valid Active Logic One
If the active to passive transition beginning the next data bit or symbol occurs between
a
and
b, the current bit would be considered a logic one. See Figure 15-14(2).
15.5.4.9
Valid Active Logic Zero
If the active to passive transition beginning the next data bit or symbol occurs between
b
and
c, the current bit would be considered a logic zero. See Figure 15-14(3).
Figure 15-14 :
J1850 VPW Active Symbols
a
bc
b
a
(1) Invalid Active
(2) Valid Active
(3) Valid Active
64
s
128
s
d
Bit
Logic One
Logic Zero
(4) Valid SOF
Symbol
200
s
de
(5) Valid BREAK
Symbol
c
280
s
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