參數(shù)資料
型號(hào): MC68HC05P1AP
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28
封裝: PLASTIC, DIP-28
文件頁(yè)數(shù): 82/124頁(yè)
文件大小: 3724K
代理商: MC68HC05P1AP
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)當(dāng)前第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)
NON-DISCLOSURE
AGREEMENT
REQUIRED
Input/Output Ports
General Release Specification
MC68HC05P1A Rev. 3.0
Input/Output Ports
7.7 I/O Port Programming
Each pin on ports A through D (except pin 7 of port D) may be
programmed as an input or an output under software control as shown
is determined by the state of its corresponding bit in the associated port
data direction register (DDR). A pin is configured as an output if its
corresponding DDR bit is set to a logic 1. A pin is configured as an input
if its corresponding DDR bit is cleared to a logic 0.
Table 7-1. Port A I/O Pin Functions
DDRA
I/O Pin
Mode
Accesses to
DDRA @ $0004
Accesses to Data
Register @ $0000
IRQ
Source
Read/Write
Read
Write
0
Input, Hi-Z
DDRA0–DDRA7
I/O Pin
*
Enabled**
1
Output
DDRA0–DDRA7
PA0–PA7
Disabled
*Does not affect input, but stored to data register
**If enabled via mask option
Table 7-2. Port B I/O Pin Functions
DDRB
I/O Pin
Mode
Accesses to
DDRB @ $0005
Accesses to Data
Register @ $0001
Read/Write
Read
Write
0
Input, Hi-Z
DDRB5–DDRB7
I/O Pin
*
1
Output
DDRB0–DDRB7
PB5–PB7
*Does not affect input, but stored to data register
Table 7-3. Port C I/O Pin Functions
DDRC
I/O Pin
Mode
Accesses to
DDRC @ $0006
Accesses to Data
Register @ $0002
Read/Write
Read
Write
0
Input, Hi-Z
DDRC0–DDRA7
I/O Pin
*
1
Output
DDRC0–DDRA7
PC0–PC7
*Does not affect input, but stored to data register
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
相關(guān)PDF資料
PDF描述
MC68HCL05P1ADW 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
MC68HC05P2CFN 8-BIT, MROM, MICROCONTROLLER, PQCC32
MC68HC05P2FN 8-BIT, MROM, MICROCONTROLLER, PQCC32
MC68HC05P3DWR3 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
MC68HC705P3CS 8-BIT, OTPROM, MICROCONTROLLER, CDIP28
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC05P1CDW 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit
MC68HC05P1CP 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit
MC68HC05P1DW 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit
MC68HC05P1P 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit
MC68HC05P3 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:microcomputer unit with 16-bit programmable timer