參數(shù)資料
型號: MC68HC05K3CSDR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDSO20
封裝: SSOP-20
文件頁數(shù): 108/132頁
文件大?。?/td> 1188K
代理商: MC68HC05K3CSDR2
8-Bit Timer
Operating During Stop Mode
MC68HC05K3 — Revision 4.0
Technical Data
MOTOROLA
8-Bit Timer
77
8.5 Operating During Stop Mode
The timer system is cleared when going into stop mode. When STOP is
exited by an external interrupt or an external RESET, the internal
oscillator resumes, followed by a 16- or 4064-cycle internal processor
oscillator stabilization delay. The timer system counter is then cleared
and operation resumes. If the STOP instruction is disabled by mask
option to create the halt mode, the effects on the timer are as described
8.6 Operating During Wait Mode
The CPU clock halts during wait mode, but the timer remains active. If
interrupts are enabled, a timer interrupt or custom periodic interrupt
causes the processor to exit wait mode.
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