參數(shù)資料
型號(hào)： MC68HC05K3CSDR2
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDSO20
封裝： SSOP-20
文件頁數(shù)： 105/132頁
文件大?。?/td> 1188K
代理商： MC68HC05K3CSDR2
Technical Data
MC68HC05K3 — Revision 4.0
74
8-Bit Timer
MOTOROLA
8-Bit Timer
8.3.2 Timer Status/Control Register
The TSCR contains the timer interrupt flag, the timer interrupt enable
bits, and the real-time interrupt rate select bits. Bit 2 and bit 3 are
write-only bits that read as logical 0s. Figure 8-3 shows the value of
each bit in the TSCR following reset.
TOF — Timer Overflow Bit
The TOF is a read-only flag bit that is set when the 8-bit ripple counter
rolls over from $FF to $00. A timer interrupt request is generated if
TOF is set when TOIE is also set. The TOF flag bit is reset by writing
a logical 1 to the TOFR acknowledge bit. Writing to the TOF flag bit
has no effect on its value. This bit is cleared by reset.
RTIF — Real-Time Interrupt Flag Bit
The RTIF is a read-only flag bit that is set when the output of the
chosen (one-of-four selection) real-time interrupt stage goes active. A
timer interrupt request is generated if RTIF is set when RTIE is also
set. The RTIF flag bit is reset by writing a logical 1 to the RTIFR
acknowledge bit. Writing to the RTIF flag bit has no effect on its value.
This bit is cleared by reset.
TOIE — Timer Overflow Interrupt Enable Bit
The TOIE is an enable bit that allows generation of a timer interrupt.
When the TOIE enable bit is set, the TIMER Interrupt is generated
when the TOF flag bit is set. This bit is cleared by reset.
Address:
$0008
Bit 7
654321
Bit 0
Read:
TOF
RTIF
TOIE
RTIE
00
RT1
RT0
Write:
TOFR
RTIFR
Reset:
00000011
= Unimplemented
Figure 8-3. Timer Status/Control Register (TSCR)
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