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參數(shù)資料
| 型號： | MC68HC05E0FN |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 40/96頁 |
| 文件大小： | 890K |
| 代理商： | MC68HC05E0FN |
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4
MC68HC05E0
MOTOROLA
4-9
RESETS, INTERRUPTS AND LOW POWER MODES
INTFX, INTFA, INTFB
These three bits (Interrupt Flag and Acknowledge) indicate the occurrence of interrupt signals
from INTX (external interrupt), Timer A and Timer B. Timers A and B generate interrupt signals
when their nal values are reached:
1 (set)
–
Interrupt has occurred
0 (clear) –
Interrupt has not occurred
Writing a “0” to one of these bits acknowledges the interrupt and resets the interrupt signal.
INTXP
The INTXP bit (Program External Interrupt) selects which signal edge or level on the INTX input
generates an external interrupt:
1 (set)
–
Interrupt on rising edge or logic high level
0 (clear) –
Interrupt on falling edge or logic low level
This bit only inuences the effect of a signal coming from an external source (INTX) but not the
function of the IRQB signal to the microprocessor.
WAKF
The WAKF bit (Wake-up Flag) indicates that an interrupt was generated by the Wake-up function
on Port C:
1 (set)
–
Interrupt caused by wake-up function
0 (clear) –
Interrupt not caused by wake-up function
Writing a “0” to one of these bits acknowledges the interrupt and resets the interrupt signal.
Additional control of external interrupts is achieved via the PITX bit in the Timer Control Register
($000C):
PITX
The PITX bit (Program Interrupt Type eXternal) provides additional control of external interrupts
by selecting either edge or level sensitive triggering.
1 (set)
–
Level-triggered interrupt selected
0 (clear) –
Edge-triggered only interrupt selected
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Timer control register
$000C
SC1
SC0
PITX
PITW
1
XHOM
CEIB
CEIA
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45
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