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參數(shù)資料
| 型號： | MC68B912B32 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 2.5V 100ppm/Degrees C, 50uA in SOT23-3 Series (Bandgap) Voltage Reference 3-SOT-23 -40 to 125 |
| 中文描述： | 16位微控制器 |
| 文件頁數(shù)： | 101/128頁 |
| 文件大?。?/td> | 748K |
| 代理商： | MC68B912B32 |
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MC68HC912B32
MC68HC912B32TS/D
MOTOROLA
101
RX4XE — Receive 4X Enable
Reception of a BREAK symbol automatically clears this bit and sets the BSVR register to $1C.
0 = BDLC transmits and receives at 10.4 kbps
1 = BDLC is in 4X receive only operation
NBFS — Normalization Bit Format Select
Controls the format of the normalization bit.
0 = Normalization bit is a zero (0) when the response part of an in-frame response (IFR) does not
end with a CRC byte. Normalization bit is a one (1) when the response part of an in-frame re-
sponse (IFR) ends with a CRC byte.
1 = Normalization bit is a one (1) when the response part of an in-frame response (IFR) does not
end with a CRC byte. Normalization bit is a zero (0) when the response part of an in-frame re-
sponse (IFR) ends with a CRC byte.
TEOD — Transmit End of Data
Marks the end of a BDLC message by appending an 8-bit CRC after completing transmission of the
current byte. This bit is also used to end an IFR transmission.
0 = TEOD is automatically cleared at the rising edge of the first CRC bit or if an error is detected.
When TEOD is used to end an IFR transmission, TEOD is cleared when the BDLC receives
back a valid EOD symbol or an error condition occurs.
1 = Transmit EOD symbol
TSIFR, TMIFR1, TMIFR0 — Transmit In-Frame Response Control
Controls the type of in-frame response being sent. If more than one bit is set, the bits will be interpreted
according to
Table 34
although the bits can be read back as they were set.
The BDLC supports the in-frame response (IFR) features of J1850. The four types of J1850 IFR are
shown below.
Table 34 Transmit In-Frame Response Control Bit Priority Encoding
Write/Read
TMIFR1
0
Internal Interpretation
TMIFR1
0
0
1
0
TSIFR
0
1
0
0
TMIFR0
0
TSIFR
0
1
0
0
TMIFR0
0
0
0
1
1
0
1
Shaded cells indicate bits which do not affect internal interpretation. These bits will be read
back as written.
相關PDF資料 |
PDF描述 |
|---|---|
| MC68C912B32FU8 | 16-Bit Microcontroller |
| MC68B912B32FU8 | 16-Bit Microcontroller |
| MC68C912B32CFU8 | 16-Bit Microcontroller |
| MC68CK338 | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| MC68EC060 | 32-Bit Microprocessors.(32位微處理器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC68B912B32FU8 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:16-Bit Microcontroller |
| MC68BOOL | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8-BIT MICROPROCESSING UNIT (MPU) |
| MC68BOOP | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8-BIT MICROPROCESSING UNIT (MPU) |
| MC68BOOS | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8-BIT MICROPROCESSING UNIT (MPU) |
| MC68C812A4 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Technical Supplement MC68C812A4 3.3V Electrical Characteristics |
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