
MOTOROLA
ELECTRICAL CHARACTERISTICS
MC68336/376
A-6
USER’S MANUAL
NOTES:
1. Applies to :
Port E[7:4] — SIZ[1:0], AS, DS
Port F[7:0] — IRQ[7:1], MODCLK
Port QS[7:0] — TXD, PCS[3:1], PCS0/SS, SCK, MOSI, MISO
TPUCH[15:0], T2CLK, CPWM[8:5], CTD[4:3], CTD[10:9], CTM2C
BKPT/DSCLK, IFETCH, RESET, RXD, TSTME/TSC
EXTAL (when PLL enabled)
2. Input-Only Pins: EXTAL, TSTME/TSC, BKPT, PAI, T2CLK, RXD, CTM2C
Output-Only Pins: CSBOOT, BG/CS, CLKOUT, FREEZE/QUOT, IPIPE
Input/Output Pins:
Group 1: DATA[15:0], IFETCH, TPUCH[15:0], CPWM[8:5], CTD[4:3], CTD[10:9]
Group 2: Port C[6:0] — ADDR[22:19]/CS[9:6], FC[2:0]/CS[5:3]
Port E[7:0] — SIZ[1:0], AS, DS, AVEC, RMC, DSACK[1:0]
Port F[7:0] — IRQ[7:1], MODCLK
Port QS[7:3] — TXD, PCS[3:1], PCS0/SS
ADDR23/CS10/ECLK, ADDR[18:0], R/W, BERR, BR/CS0, BGACK/CS2
Group 3: HALT, RESET
Group 4: MISO, MOSI, SCK
Pin groups do not include QADC pins. See Tables A-11 through A-14 for information concerning the QADC.
3. Does not apply to HALT and RESET because they are open drain pins. Does not apply to port QS[7:0] (TXD,
PCS[3:1], PCS0/SS, SCK, MOSI, MISO) in wired-OR mode.
4. Use of an active pulldown device is recommended.
5. Total operating current is the sum of the appropriate IDD, IDDSYN, and ISB values. IDD values include supply
currents for device modules powered by VDDE and VDDI pins.
6. Current measured at maximum system clock frequency, all modules active.
7. The SRAM module will not switch into standby mode as long as VSB does not exceed VDD by more than 0.5
volts. The SRAM array cannot be accessed while the module is in standby mode.
8. When VDD is transitioning during power-up or power down sequence, and VSB is applied, current flows between
the VSTBY and VDD pins, which causes standby current to increase toward the maximum transient condition
specification. System noise on the VDD and VSTBY pins can contribute to this condition.
9. Power dissipation measured at system clock frequency, all modules active. Power dissipation can be calculated us-
ing the following expression:
PD = Maximum VDD (Run IDD + IDDSYN + ISB) + Maximum VDDA (IDDA)
10. This parameter is periodically sampled rather than 100% tested.
336376UMBook Page 6 Friday, November 15, 1996 2:09 PM