參數(shù)資料
型號： MC56F8157
廠商： Electronic Theatre Controls, Inc.
英文描述： 16-BIT HYBRID CONTROLLERS
中文描述： 16位混合控制器
文件頁數(shù)： 32/172頁
文件大小： 2444K
代理商： MC56F8157
56F8357 Technical Data, Rev. 8.0
32
Freescale Semiconductor
Preliminary
INDEX1
(TB2)
(MISO1)
(GPIOC2)
8
Schmitt
Input
Schmitt
Input/
Output
Schmitt
Input/
Output
Schmitt
Input/
Output
Input
Input
Input
Input
Index1
— Quadrature Decoder 1, INDEX input
TB2
— Timer B, Channel 2
SPI 1 Master In/Slave Out
— This serial data pin is an input to a
master device and an output from a slave device. The MISO line of
a slave device is placed in the high-impedance state if the slave
device is not selected. The slave device places data on the MISO
line a half-cycle before the clock edge the master device uses to
latch the data. To activate the SPI function, set the INDEX_ALT bit
in the SIM_GPS register. For details, see
Part 6.5.8
.
Port C GPIO
— This GPIO pin can be individually programmed as
an input or output pin.
In the 56F8357, the default state after reset is INDEX1.
In the 56F8157, the default state is not one of the functions offered
and must be reconfigured.
To deactivate the internal pull-up resistor, clear bit 2 in the
GPIOC_PUR register.
HOME1
(TB3)
(SS1)
(GPIOC3)
9
Schmitt
Input
Schmitt
Input/
Output
Schmitt
Input
Schmitt
Input/
Output
Input
Input
Input
Input
Home
— Quadrature Decoder 1, HOME input
TB3
— Timer B, Channel 3
SPI 1 Slave Select
— In the master mode, this pin is used to
arbitrate multiple masters. In slave mode, this pin is used to select
the slave. To activate the SPI function, set the HOME_ALT bit in
the SIM_GPS register. For details, see
Part 6.5.8
.
Port C GPIO
— This GPIO pin can be individually programmed as
an input or output pin.
In the 56F8357, the default state after reset is HOME1.
In the 56F8157, the default state is not one of the functions offered
and must be reconfigured.
To deactivate the internal pull-up resistor, clear bit 3 in the
GPIOC_PUR register.
Table 2-2 Signal and Package Information for the 160-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
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