參數(shù)資料
型號： MC56F8157
廠商： Electronic Theatre Controls, Inc.
英文描述： 16-BIT HYBRID CONTROLLERS
中文描述： 16位混合控制器
文件頁數(shù)： 143/172頁
文件大?。?/td> 2444K
代理商： MC56F8157
External Memory Interface Timing
56F8357 Technical Data, Rev. 8.0
Freescale Semiconductor
Preliminary
143
DCAOE and DCAEO are calculated as follows:
The timing of write cycles is different when WWS = 0 than when WWS > 0. Therefore, some parameters
contain two sets of numbers to account for this difference. Use the “Wait States Configuration” column
of
Table 10-16
to make the appropriate selection.
Figure 10-4 External Memory Interface Timing
Note:
When multiple lines are given for the same wait state configuration, calculate each and then select the
smallest or most negative.
DCAOE =
=
0.5 - MAX XTAL duty cycle, if ZSRC selects prescaler clock and the prescaler is set to
÷
1
0.0 all other cases
MIN XTAL duty cycle - 0.5, if ZSRC selects prescaler clock and the prescaler is set to
÷
1
0.0 all other cases
Example of DCAOE and DCAEO calculation:
Assuming prescaler is set for
÷
1 and prescaler clock is selected by ZSRC, if XTAL duty cycle
ranges between 45% and 60% high;
DCAEO =
=
DCAOE = .50 - .60 = - 0.1
DCAEO = .45 - .50 = - 0.05
t
DRD
t
RDD
t
AD
t
DOH
t
DOS
t
DWR
t
RDWR
t
WAC
t
WRRD
t
WR
t
AWR
t
WRWR
t
ARDD
t
RDA
t
RDRD
t
RD
t
ARDA
Data Out
Data In
A0-Axx,CS
RD
WR
D0-D15
Note: During read-modify-write instructions and internal instructions, the address lines do not change state.
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