參數(shù)資料
型號(hào): MC56F8157
廠商: Electronic Theatre Controls, Inc.
英文描述: 16-BIT HYBRID CONTROLLERS
中文描述: 16位混合控制器
文件頁數(shù): 20/172頁
文件大?。?/td> 2444K
代理商: MC56F8157
56F8357 Technical Data, Rev. 8.0
20
Freescale Semiconductor
Preliminary
CLKO
3
Output
Tri-Stated
Clock Output
— This pin outputs a buffered clock signal. Using
the SIM CLKO Select Register (SIM_CLKOSR), this pin can be
programmed as any of the following: disabled, CLK_MSTR
(system clock), IPBus clock, oscillator output, prescaler clock and
postscaler clock. Other signals are also available for test
purposes.
See
Part 6.5.7
for details.
A0
(GPIOA8)
154
Output
Input/
Output
Tri-stated
Address Bus
— A0 - A5 specify six of the address lines for
external program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), A0–A5 and EMI control signals are tri-stated when the
external bus is inactive.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
Port A GPIO
— These six GPIO pins can be individually
programmed as input or output pins.
After reset, the default state is Address Bus.
To deactivate the internal pull-up resistor, clear the appropriate
GPIO bit in the GPIOA_PUR register.
Example: GPIOA8, clear bit 8 in the GPIOA_PUR register.
A1
(GPIOA9)
10
A2
(GPIOA10)
11
A3
(GPIOA11)
12
A4
(GPIOA12)
13
A5
(GPIOA13)
14
Table 2-2 Signal and Package Information for the 160-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
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