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參數(shù)資料
| 型號： | MC145572APB |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 6/52頁 |
| 文件大小： | 0K |
| 描述： | IC ISDN INTERFACE TXCVER 44-LQFP |
| 標(biāo)準包裝： | 160 |
| 類型： | 收發(fā)器 |
| 規(guī)程： | RS232 |
| 電源電壓： | 5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LQFP |
| 供應(yīng)商設(shè)備封裝： | 44-LQFP（10x10） |
| 包裝： | 托盤 |
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MC145572EVK
2.1.2
Crystal Oscillator (LT Mode)
In the LT mode, the internal phase locked loop (PLL) of the MC145572 generates a 20.48 MHz clock which
is phase locked to an 8 kHz reference clock applied at the FREQREF pin. This assures that the transmitted
2B1Q signal is synchronized to the 8 kHz frequency reference. A single pullable crystal, Y1, is all that is
required for the MC145572 oscillator. All other frequency pulling circuitry is internal to the MC145572.
It is also possible to provide an external 8 kHz frequency reference rather than using the 8 kHz frequency
reference generated on-board from the 5 ppm oscillator, Y5. This is accomplished using the RFoff-RFon
switch of S2-1 and connecting the external reference to EXTREF of J9. RFoff selects the off-board 8 kHz
frequency reference and RFon selects the on-board 8 kHz frequency reference. See also the explanation
for S2-1 and S2-7 in Section 2.7.2.
2.1.3
Crystal Oscillator (NT Mode)
The NT-congured MC145572 U10, requires only a single pullable crystal, Y2, for its oscillator. All other
frequency pulling circuitry is internal to the MC145572.
2.2
S/T-INTERFACE
The S/T-Interface resides on the NT1 portion of the MC145572EVK and is implemented using the
MC145574 S/T-Interface Transceiver (U17). The 600 mil 28-pin Plastic SOIC MC145574 conforms to both
CCITT I.430 and ANSI T1.605 specications. External line interface circuitry for switching between NT
and TE operating modes is incorporated.
Two 8-pin RJ-45 telephone jacks are used at the S/T-Interface, one congured for the NT mode (J24) of
operation and one congured for the TE mode (J23) of operation. The Tx pair, pins 4 and 5 on the NT jack
and pins 3 and 6 on the TE jack, are driven by the TxP and TxN pins which act as a current limited differential
voltage source. The drive resistance (R40, R42) is necessary to conform to the ANSI T1.605 pulse mask
specication. A dual 2.5:1 turns ratio transformer (T4A:B) is used to couple the Tx and Rx pairs to the
4-wire interface. A high frequency 4-wire common mode choke transformer (T3 for TE and T5 for NT)
provides an effective means of compliance with EMI suppression.
The protection diodes (D29A:G, D30A:G MMAD1108) provide secondary protection to the MC145574,
even when it is powered down, without loading the S/T-Interface bus. CCITT I.430, ETSI ETS 300012, and
ANSI T1.605 specify that the S/T-interface voltage cannot exceed 1.6 times the nominal voltage of 750 mV
(= 1.2 V). Since the MC145574 is designed to operate with 2.5:1 turns ratio transformers, the diode structure
is required to provide protection, while not adversely affecting the S/T-interface when power is removed
from the device. This diode structure also protects the circuit against electrostatic discharges (ESD) and
latch-up.
The S/T-Interface Transceiver implementation on this board can be used in either NT or TE mode. Pin 4,
TE/NT(L), of the MC145574 determines whether the chip is in NT or TE mode of operation. When
congured as a TE, pins 9 and 8 are used as DREQUEST and DGRANT, respectively. The DREQUEST
pin is used by an external controller such as the MC145488 DDLC or the MC68302 IMP to request access
to the D-Channel. When the S/T-Interface Transceiver gains access to the D-Channel time slot on the
S/T-Interface bus, it asserts DGRANT high, informing the external controller that it can transmit its
D-Channel data in the next IDL D time slot. In the NT mode, pin 6 performs the FIX and TFSC functions.
FIX tells the S/T-Interface Transceiver to use Fixed or Adaptive timing recovery. TFSC is asserted when
frame synchronization has been achieved at the S/T-Interface bus. For a more complete discussion on
D-Channel operation, please refer to Section 11 of the MC145574/75 S/T-Interface Transceiver data
manual.
With the left side of the board operating as an NT1, the MC145574 S/T-Interface Transceiver is in the NT
mode, operating as an IDL Slave, and is receiving its Clock and Sync signals from the MC145572
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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