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參數(shù)資料
| 型號： | MC145572APB |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 40/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ISDN INTERFACE TXCVER 44-LQFP |
| 標準包裝： | 160 |
| 類型： | 收發(fā)器 |
| 規(guī)程： | RS232 |
| 電源電壓： | 5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LQFP |
| 供應(yīng)商設(shè)備封裝： | 44-LQFP（10x10） |
| 包裝： | 托盤 |
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MC145572EVK
46
MC145572EVK after invoking any of the LPU commands. Each U-Interface Transceiver can be
independently put into analog loop-back.
The echo canceller loop-back is an external analog loop-back where data received on the U-Interface
Transceiver IDL Rx pin is framed up and then transmitted as 2B1Q symbols. The 2B1Q symbols are
received by the U-Interface Transceiver and cancelled by the echo canceller. Only the echo cancellers are
enabled during this mode. When the U-Interface Transceiver is operating correctly, BR12+BR13 should
have a low value. Preferably, BR12 should be 00 and BR13 should be a low value. BR13 will continue to
uctuate in value slightly. BR11 should read as 10 or 11. Several seconds may elapse before the registers
reach a steady state and the correct bits are set.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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