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MB90670/675 Series
6. 16-bit Reload Timer (with Event Count Function)
The 16-bit reload timer consists of a 16-bit down counter, a 16-bit reload register, one input pin (TIN), one output
pin (TOUT), and a control status register. Three internal clocks and an external clock can be selected for the
input clock. When in reload mode, a toggled output waveform is output, while in one-shot mode a square wave
indicating that the count is in progress is output. The input pin (TIN) serves as an event input in event count
mode, and can be used for trigger input or gate input in internal clock mode.
In this product, there are two channels for this timer on chip.
(1) Register Configuration
Control status register upper
16-bit timer register upper/
16-bit reload register upper
Address : channel 0 00003B
H
channel 1 00003F
H
7
6
5
4
3
2
1
0
←
Bit no.
TMCSR0
TMCSR1
TMCSR0
TMCSR1
←
Bit no.
15
14
13
12
11
10
9
8
Read/write
→
Initial value
→
(—)
(—)
(—)
(—)
(—)
(—)
(—)
(—)
(R/W)
(0)
4
(R/W)
(0)
3
(R/W)
(0)
2
(R/W)
(0)
1
Read/write
→
Initial value
→
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
Read/write
→
Initial value
→
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
Read/write
→
Initial value
→
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
16-bit timer register lower/
16-bit reload register lower
Address : channel 0 00003A
H
channel 1 00003E
H
15
14
13
12
11
10
9
8
TMR0, 1/
TMRLR0, 1
TMR0, 1/
TMRLR0, 1
←
Bit no.
Address : channel 0 000039
H
channel 1 00003D
H
Control status register lower
Address : channel 0 000038
H
channel 1 00003C
H
CSL0
CSL1
MOD2 MOD1
—
—
—
—
←
Bit no.
7
6
5
0
UF
INTE
CNTE TRG
OUTE
MOD0
OUTL RELD