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參數(shù)資料
| 型號： | MB90P678 |
| 廠商： | Fujitsu Limited |
| 英文描述： | 16-Bit Proprietary Microcontroller(16位專用微控制器) |
| 中文描述： | 16位微控制器專利（16位專用微控制器） |
| 文件頁數(shù)： | 46/111頁 |
| 文件大?。?/td> | 736K |
| 代理商： | MB90P678 |
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MB90670/675 Series
46
5. PPG
PPG is an 8-bit reload timer module that generates PPG output through pulse output control in accordance with
the timer operation.
In terms of hardware, this module consists of two 8-bit down counters, four 8-bit PPG reload registers, one 16-
bit PPG operating mode control register, two external pulse output pins, and two interrupt outputs. This hardware
is used to implement the following functions:
8-bit PPG output two-channel independent operating mode: Permits independent PPG output operation on two
channels.
16-bit PPG output operating mode: Permits PPG output operations on one 16-bit channel.
8 + 8-bit PPG output operating mode: Permits 8-bit PPG output operation with any cycle by using the channel 0
output as the channel 1 clock input.
PPG output operation: Outputs a pulse waveform with any cycle and any duty ratio. Can also be used as a
D/A converter by providing an external circuit.
(1) Register Configuration
PEN0
—
POE0 PIE0 PUF0 PCM1 PCM0
Reserved
PPGC0
PPG0 operating mode control register
Address : channel 0 000030
H
PPG1 operating mode control register
Address : channel 1 000031
H
PPG0 reload register upper
PPG1 reload register upper
Address : channel 0 000035
H
channel 1 000037
H
PPG0 reload register lower
PPG1 reload register lower
Address : channel 0 000034
H
channel 1 000036
H
PEN1 PCS1 POE1 PIE1 PUF1 MD1
MD0
Reserved
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
15
14
13
12
11
10
9
8
←
Bit no.
PPGC1
←
Bit no.
PRLH0
PRLH1
←
Bit no.
15
14
13
12
11
10
9
8
Read/write
→
Initial value
→
(R/W)
(0)
(—)
(—)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(—)
(1)
Read/write
→
Initial value
→
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
Read/write
→
Initial value
→
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
(R/W)
(X)
Read/write
→
Initial value
→
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(—)
(1)
PRLL0
PRLL1
←
Bit no.
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