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CHAPTER 6 INTERRUPTS
MB90560 series
6.6
Interrupt of Extended Intelligent I/O Service (EI2OS)
The extended intelligent I/O service (EI
2
OS) automatically transfers data between a
peripheral function (I/O) and memory. When the data transfer terminates, a hardware
interrupt is generated.
I
Extended intelligent I/O service (EI
2
OS)
The extended intelligent I/O service is a type of hardware interrupt. It automatically transfers data
between a peripheral function (I/O) and a memory. Traditionally, data transfer with a peripheral
function (I/O) has been performed by the interrupt processing program. EI
2
OS performs this data
transfer in the same way as direct memory access (DMA). At termination, EI
2
OS sets the
termination condition and automatically branches to the interrupt processing routine. The user
creates programs only for EI
2
OS activation and termination. Data transfer programs in between
are not required.
G
Advantages of extended intelligent I/O service (EI
2
OS)
Compared to data transfer performed by the interrupt processing routine, EI
2
OS has the
following advantages.
Coding a transfer program is not necessary, reducing program size.
Because transfer can be stopped depending on the peripheral function (I/O) status,
unnecessary data transfer can be eliminated.
Incrementing or no updating can be selected for the buffer address.
Incrementing or no updating can be selected for the I/O register address.
G
Extended intelligent I/O service (EI
2
OS) termination interrupt
When data transfer by EI
2
OS terminates, a termination condition is set in the S1 and S0 bits in
the interrupt control register (ICR). Processing then automatically branches to the interrupt
processing routine.
The EI
2
OS termination factor can be determined by checking the EI
2
OS status (ICR: S1, S0) with
the interrupt processing program.
<Reference>
Interrupt numbers and interrupt vectors are permanently set for each peripheral. See Section
6.2, "Interrupt Causes and Interrupt Vectors," in Chapter 6 for more information.
G
Interrupt control register (ICR)
This register, which is located in the interrupt controller, activates EI
2
OS, specifies the EI
2
OS
channel, and displays the (EI2OS) termination status.
G
Extended intelligent I/O service (EI
2
OS) descriptor (ISD)
This descriptor, which is located in RAM at “000100
H
” to “00017F
H
”, is an eight-byte data that
retains the transfer mode, I/O address, transfer count, and buffer address. The descriptor
handles 16 channels. The channel is specified by the interrupt control register (ICR).
<Check>
When the extended intelligent I/O service (EI
2
OS) is operating, execution of the CPU program
stops.