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參數(shù)資料
| 型號(hào)： | MB86960APF-G |
| 廠商： | Fujitsu Limited |
| 英文描述： | NETWORK INTERFACE CONTROLLER with ENCODER/DECODER (NICE) |
| 中文描述： | 網(wǎng)絡(luò)接口控制器的編碼/解碼器（尼斯） |
| 文件頁(yè)數(shù)： | 25/65頁(yè) |
| 文件大?。?/td> | 488K |
| 代理商： | MB86960APF-G |
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MB86960
Transmit Interrupt Enable Register
This register contains the bits which enable or mask the
status bits in DLCR0 from generating interrupts. Only
bits 7, 2 and 1 can generate interrupts. The other bits are
not used. See Table 6.
Table 6. DLCR2 — Transmit Interrupt Enable Register
BIT
SYMBOL
TYPE
DESCRIPTION
7
INT EN
R
W
0
INTERRUPT ENABLE:
When high, enables TX DONE to generate interrupt.
See also DLCR0<7>.
6
0
N
0
RESERVED:
Write 0.
5
INT EN
N
0
RESERVED:
Write 0.
4
0
N
0
RESERVED:
Write 0.
3
0
N
0
RESERVED:
Write 0.
2
INT EN
R
W
0
INTERRUPT ENABLE:
When high, enables COL to generate interrupt.
See also DLCR0<2>.
1
INT EN
R
W
0
INTERRUPT ENABLE:
When high, enables 16 COL to generate interrupt.
See also DLCR0<1>.
0
0
N
0
RESERVED:
Write 0.
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| MB86961A | UNIVERSAL INTERFACE FOR 10BASET |
| MB86961APD-G | UNIVERSAL INTERFACE FOR 10BASET |
| MB86961APF-G | UNIVERSAL INTERFACE FOR 10BASET |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB86961A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:UNIVERSAL INTERFACE FOR 10BASET |
| MB86961APD-G | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:UNIVERSAL INTERFACE FOR 10BASET |
| MB86961APF-G | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:UNIVERSAL INTERFACE FOR 10BASET |
| MB86965 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:EtherCoupler ETHERNET CONTROLLER WITH 10BASE?T TRANSCEIVER |
| MB86965B | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:EtherCoupler ETHERNET CONTROLLER WITH 10BASE?T TRANSCEIVER |
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