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參數資料
| 型號： | MB8117400B-60 |
| 廠商： | Fujitsu Limited |
| 英文描述： | 4 M ×4 BITS Fast Page Mode Dynamic RAM(CMOS 4 M ×4 位快速頁面存取模式RAM) |
| 中文描述： | 4米× 4位快速頁面模式動態(tài)RAM（的CMOS 4米× 4位快速頁面存取模式的RAM） |
| 文件頁數： | 1/28頁 |
| 文件大?。?/td> | 473K |
| 代理商： | MB8117400B-60 |
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DS05-11316-1E
FUJITSU SEMICONDUCTOR
DATA SHEET
MEMORY
CMOS
4 M
FAST PAGE MODE DYNAMIC RAM
MB8117400B-50/-60
×
4 BITS
CMOS 4,194,304
×
4 BITS Fast Mode Dynamic RAM
I
DESCRIPTION
The Fujitsu MB8117400B is a fully decoded CMOS Dynamic RAM (DRAM) that contains 16,777,216 memory
cells accessible in 4-bit increments. The MB8117400B features a “fast page” mode of operation whereby high-
speed random access of up to 1,024-bits of data within the same row can be selected. The MB8117400B DRAM
is ideally suited for mainframe, buffers, hand-held computers video imaging equipment, and other memory
applications where very low power dissipation and high bandwidth are basic requirements of the design. Since
the standby current of the MB8117400B is very small, the device can be used as a non-volatile memory in
equipment that uses batteries for primary and/or auxiliary power.
The MB8117400B is fabricated using silicon gate CMOS and Fujitsu’s advanced four-layer polysilicon and two-
layer aluminum process. This process, coupled with advanced stacked capacitor memory cells, reduces the
possibility of soft errors and extends the time interval between memory refreshes. Clock timing requirements for
the MB8117400B are not critical and all inputs are TTL compatible.
I
PRODUCT LINE & FEATURES
Parameter
MB8117400B-50
MB8117400B-60
RAS Access Time
50 ns max.
60 ns max.
Randam Cycle Time
90 ns min.
110 ns min.
Address Access Time
25 ns min.
30 ns max.
CAS Access Time
15 ns max.
15 ns max.
Fast Page Mode Cycle Time
35 ns min.
40 ns min.
Low Power
Dissipation
Operating Current
660 mW max.
550 mW max.
Standby Current
11 mW max. (TTL level) / 5.5 mW max. (CMOS level)
4,194,304 words
×
4 bits organization
Silicon gate, CMOS, Advanced Capacitor Cell
All input and output are TTL compatible
2048 refresh cycles every 32 ms
Early Write or OE controlled write capability
RAS only, CAS-before-RAS, or Hidden
Refresh
Fast page Mode, Read-Modify-Write
capability
On chip substrate bias generator for high
performance
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