參數(shù)資料
型號： MB8116405A-60
廠商： Fujitsu Limited
英文描述： CMOS 4M ×4 BIT Hyper Page Mode Dynamic RAM(CMOS 4M ×4 位超級頁面存取模式動態(tài)RAM)
中文描述： 的CMOS 4米× 4位超頁模式動態(tài)RAM的CMOS（4米× 4位超級頁面存取模式動態(tài)內(nèi)存）
文件頁數(shù)： 23/28頁
文件大?。?/td> 536K
代理商： MB8116405A-60
23
MB8116405A-60/MB8116405A-70
Fig. 15 – RAS-ONLY REFRESH (WE = OE = “H” or “L”)
Fig. 16 – CAS-BEFORE-RAS REFRESH (ADDRESS = WE = OE = “H” or “L”)
V
IH
V
IL
RAS
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
CAS
A
0
to A
11
DQ
(Output)
V
IH
V
IL
V
OH
V
OL
V
IH
V
IL
RAS
CAS
DQ
(Output)
“H” or “L”
DESCRIPTION
Refresh of RAM memory cells is accomplished by performing a read, a write, or a read-modify-write cycle at each of 4096 row addresses
every 65.6-milliseconds. Three refresh modes are available: RAS-only refresh, CAS-before-RAS refresh, and hidden refresh.
RAS-only refresh is performed by keeping RAS Low and CAS High throughout the cycle; the row address to be refreshed is latched on
the falling edge of RAS. During RAS-only refresh, D
OUT
pin is kept in a high-impedance state.
“H” or “L”
DESCRIPTION
CAS-before-RAS refresh is an on-chip refresh capability that eliminates the need for external refresh addresses. If CAS is held Low for
the specified setup time (t
CSR
) before RAS goes Low, the on-chip refresh control clock generators and refresh address counter are
enabled. An internal refresh operation automatically occurs and the refresh address counter is internally incremented in preparation for
the next CAS-before-RAS refresh operation.
HIGH-Z
ROW ADDRESS
t
ASR
t
RAH
t
RC
t
RAS
t
RPC
t
CRP
t
CRP
t
OFF
t
OH
t
RP
HIGH-Z
t
RAD
t
RC
t
CPN
t
RAS
t
RP
t
RPC
t
CSR
t
CPN
t
CHR
t
CSR
t
OFF
t
OH
相關PDF資料
PDF描述
MB8116405A-70 CMOS 4M ×4 BIT Hyper Page Mode Dynamic RAM(CMOS 4M ×4 位超級頁面存取模式動態(tài)RAM)
MB81164442A-100L CMOS 4×4M×16 BIT Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4×4M×16 位同步動態(tài)RAM)
MB81164442A-100 CMOS 4×4M×16 BIT Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4×4M×16 位同步動態(tài)RAM)
MB81164442A-125 CMOS 4×4M×16 BIT Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4×4M×16 位同步動態(tài)RAM)
MB81164442A-125L CMOS 4×4M×16 BIT Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4×4M×16 位同步動態(tài)RAM)
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