- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383304 > M5M4V4S40CTP-15 (Mitsubishi Electric Corporation) 4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM PDF資料下載
參數(shù)資料
| 型號： | M5M4V4S40CTP-15 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM |
| 中文描述： | 4分（2 -銀行甲131072字x 16位）同步DRAM |
| 文件頁數(shù)： | 4/45頁 |
| 文件大?。?/td> | 1458K |
| 代理商： | M5M4V4S40CTP-15 |
第1頁第2頁第3頁當(dāng)前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁
4
M5M4V4S40CTP-12, -15
Feb ‘97
Preliminary
MITSUBISHI LSIs
4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM
MITSUBISHI ELECTRIC
SDRAM (Rev. 0.3)
BASIC FUNCTIONS
The M5M4V4S40CTP has the following basic functions, bank (row) activate, burst read/write, bank
(row) precharge, and auto/self refresh. Each command is defined by the control signals (/RAS, /CAS and
/WE) at the rising edge of CLK. The inputs /CS ,CKE and A8 are used for chip select, refresh options, and
precharge options, respectively.
Please see the command truth table for detailed definitions.
Activate (ACT) [/RAS =L, /CAS =/WE =H]
The ACT command activates a row in an idle bank. The bank address, BA, is used to select which of
the two banks will be activated.
Read (READ) [/RAS =H, /CAS =L, /WE =H]
The READ command starts burst read from the active bank indicated by BA. The first output data
appears after /CAS latency. If A8 =H when READ is issued the bank is automatically precharged after
the last burst read (READA).
Note: READA is not valid for FP burst operations
.
Write (WRITE) [/RAS =H, /CAS =/WE =L]
The WRITE command starts burst write to the active bank indicated by BA. Total data length to be
written is set by burst length. If A8 =H when WRITE is issued the bank is automatically precharged
after the last burst write (WRITEA).
Note: WRITEA is not valid for FP burst operations
.
Precharge (PRE) [/RAS =L, /CAS =H, /WE =L]
The PRE command deactivates the active bank indicated by BA. This command also terminates burst
read and write operations. If A8 =H when PRE is issued both banks are automatically precharged (PREA).
Auto-Refresh (REFA) [/RAS =/CAS =L, /WE =CKE =H]
The REFA command starts an auto-refresh cycle. The refresh address, including the bank address, is
generated internally. After this command, the banks are precharged automatically.
/CS
Chip Select : L=select, H=deselect
/RAS
Command
/CAS
Command
/WE
Command
CKE
Refresh Option @refresh command
A8
Precharge Option @precharge or read/write command
CLK
define basic commands
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M5M4V64S30ATP-10L | 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
| M5M4V64S30ATP-10 | Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85 |
| M5M4V64S30ATP-12 | 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
| M5M4V64S30ATP-8 | 30V N-Channel PowerTrench MOSFET |
| M5M4V64S30ATP-8A | Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 20-SOIC -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M4V64S20ATP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-10L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-12 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-8A | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。