參數(shù)資料
型號(hào)： M5M4V4S40CTP-15
廠商： Mitsubishi Electric Corporation
英文描述： 4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM
中文描述： 4分（2 -銀行甲131072字x 16位）同步DRAM
文件頁數(shù)： 25/45頁
文件大?。?/td> 1458K
代理商： M5M4V4S40CTP-15
25
M5M4V4S40CTP-12, -15
Feb ‘97
Preliminary
MITSUBISHI LSIs
4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM
MITSUBISHI ELECTRIC
SDRAM (Rev. 0.3)
CLK SUSPEND
CKE controls the internal CLK in the following cycle. The figure below shows how CKE works. When
CKE=L the next internal CLK is suspended. CLK suspend is used to power down, suspend the outputs, and
to suspend the inputs. Except during the self-refresh mode, CKE is a synchronous input. CLK suspend can
be performed either when the banks are active or idle; however, all commands issued in the following cycle
are ignored.
ext.CLK
CKE
int.CLK
Power Down by CKE
CLK
Command
PRE
CKE
Command
CKE
ACT
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
Standby Power Down
Active Power Down
NOP
NOP
DQ Suspend by CKE
CLK
Command
DQ
Write
D0
D1
D2
D3
CKE
READ
Q0
Q1
Q2
Q3
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