參數資料
型號: M5M4V4S40CTP-15
廠商: Mitsubishi Electric Corporation
英文描述: 4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM
中文描述: 4分(2 -銀行甲131072字x 16位)同步DRAM
文件頁數: 16/45頁
文件大小: 1458K
代理商: M5M4V4S40CTP-15
16
M5M4V4S40CTP-12, -15
Feb ‘97
Preliminary
MITSUBISHI LSIs
4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM
MITSUBISHI ELECTRIC
SDRAM (Rev. 0.3)
READ with Auto-Precharge (BL=4, CL=3)
CLK
Command
A0-7
A8
BA
DQ
ACT
Xa
Xa
0
READ
Y
1
0
Qa0
Qa1
Qa2
Qa3
ACT
Xa
Xa
0
Internal Precharge Begins
tRCD
tRP
Dual Bank Interleaving READ (BL=4, CL=3)
CLK
Command
A0-7
A8
BA
DQ
ACT
Xa
Xa
0
READ
Y
0
0
READ
Y
0
1
Qa0
Qa1
Qa2
Qa3
Qb0
Qb1
Qb2
ACT
Xb
Xb
1
PRE
0
0
tRCD
/CAS latency
Burst Length
READ Auto-Precharge Timing (BL=4)
CLK
Command
ACT
READ
Internal Precharge Begins
DQ
Qa0
Qa1
Qa2
Qa3
DQ
Qa0
Qa1
Qa2
Qa3
DQ
Qa0
Qa1
Qa2
Qa3
CL=3
CL=2
CL=1
相關PDF資料
PDF描述
M5M4V64S30ATP-10L 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-10 Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85
M5M4V64S30ATP-12 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-8 30V N-Channel PowerTrench MOSFET
M5M4V64S30ATP-8A Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 20-SOIC -40 to 85
相關代理商/技術參數
參數描述
M5M4V64S20ATP-10 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
M5M4V64S20ATP-10L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
M5M4V64S20ATP-12 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
M5M4V64S20ATP-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
M5M4V64S20ATP-8A 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM