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參數(shù)資料
| 型號： | M59MR032D |
| 廠商： | 意法半導體 |
| 英文描述： | 32 Mbit 2Mb x16, Mux I/O, Dual Bank, Burst 1.8V Supply Flash Memory |
| 中文描述： | 32兆位的2Mb x16插槽，復用的I / O，雙行，突發(fā)1.8V電源快閃記憶體 |
| 文件頁數(shù)： | 5/49頁 |
| 文件大?。?/td> | 352K |
| 代理商： | M59MR032D |
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M59MR032C, M59MR032D
Organization
The M59MR032 is organized as 2Mbit by 16 bits.
The first sixteen address lines are multiplexed with
the Data Input/Output signals on the multiplexed
address/data bus ADQ0-ADQ15. The remaining
address lines A16-A20 are the MSB addresses.
Memory control is provided by Chip Enable E, Out-
put Enable G and Write Enable W inputs.
The clock K input synchronizes the memory to the
microprocessor during burst read.
Reset RP is used to reset all the memory circuitry
and to set the chip in power-down mode if this
function is enabled by a proper setting of the Con-
figuration Register. Erase and Program operations
are controlled by an internal Program/Erase Con-
troller (P/E.C.). Status Register data output on
ADQ7 provides a Data Polling signal, ADQ6 and
ADQ2 provide Toggle signals and ADQ5 provides
error bit to indicate the state of the P/E.C opera-
tions. WAIT output indicates to the microprocessor
the status of the memory during the burst mode
operations.
Memory Blocks
The device features asymmetrically blocked archi-
tecture. M59MR032 has an array of 71 blocks and
is divided into two banks A and B, providing Dual
Bank operations. While programming or erasing in
Bank A, read operations are possible into Bank B
or vice versa. The memory also features an erase
suspend allowing to read or program in another
block within the same bank. Once suspended the
erase can be resumed. The Bank Size and Sector-
ization are summarized in Table 8. Parameter
Blocks are located at the top of the memory ad-
dress space for the M59MR032C, and at the bot-
tom for the M59MR032D. The memory maps are
shown in Tables 4, 5, 6 and 7.
The Program and Erase operations are managed
automatically by the P/E.C. Block protection
against Program or Erase provides additional data
security. Instructions are provided to protect or un-
protect any block in the application. A second reg-
ister locks the protection status while WP is low
(see Block Locking description). All blocks are pro-
tected and unlocked at Power-up.
Table 3. Bank Size and Sectorization
Bank Size
Parameter Blocks
Main Blocks
Bank A
8 Mbit
8 blocks of 4 KWord
15 blocks of 32 KWord
Bank B
24 Mbit
-
48 blocks of 32 KWord
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| M59MR032D120GC6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Mux I/O, Dual Bank, Burst 1.8V Supply Flash Memory |
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| M59MR032DGC | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Mux I/O, Dual Bank, Burst 1.8V Supply Flash Memory |
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