45
Atmel ATmega16/32/64/M1/C1 [DATASHEET]
7647K–AVR–12/13
The following code example shows one assembly and one C function for changing the time-out value of the watchdog timer.
Notes: 1.
The example code assumes that the part specific header file is included.
2.
The watchdog timer should be reset before any change of the WDP bits, since a change in the WDP bits can
result in a time-out when switching to a shorter time-out period;
7.4.1
Watchdog Timer Control Register - WDTCSR
Bit 7 - WDIF: Watchdog Interrupt Flag
This bit is set when a time-out occurs in the watchdog timer and the watchdog timer is configured for interrupt. WDIF is cleared
by hardware when executing the corresponding interrupt handling vector. Alternatively, WDIF is cleared by writing a logic one to
the flag. When the I-bit in SREG and WDIE are set, the watchdog time-out interrupt is executed.
Bit 6 - WDIE: Watchdog Interrupt Enable
When this bit is written to one and the I-bit in the status register is set, the watchdog interrupt is enabled. If WDE is cleared in
combination with this setting, the watchdog timer is in interrupt mode, and the corresponding interrupt is executed if time-out in
the watchdog timer occurs.
WDT_Prescaler_Change:
; Turn off global interrupt
cli
; Reset Watchdog Timer
wdr
; Start timed sequence
lds
r16, WDTCSR
ori
r16, (1<<WDCE) | (1<<WDE)
sts
WDTCSR, r16
; --
Got four cycles to set the new values from here -
; Set new prescaler(time-out) value = 64K cycles (~0.5 s)
ldi
r16, (1<<WDE) | (1<<WDP2) | (1<<WDP0)
sts
WDTCSR, r16
; --
Finished setting new values, used 2 cycles -
; Turn on global interrupt
sei
ret
void WDT_Prescaler_Change(void)
{
__disable_interrupt();
__watchdog_reset();
/* Start timed
equence */
WDTCSR |= (1<<WDCE) | (1<<WDE);
/* Set new prescaler(time-out) value = 64K cycles (~0.5 s) */
WDTCSR
= (1<<WDE) | (1<<WDP2) | (1<<WDP0);
__enable_interrupt();
}
Bit
765
4321
0
WDIF
WDIE
WDP3
WDCE
WDE
WDP2
WDP1
WDP0
WDTCSR
Read/Write
R/W
Initial Value
000
0
X
00
0