244
Atmel ATmega16/32/64/M1/C1 [DATASHEET]
7647K–AVR–12/13
Note:
1.
“1” means unprogrammed, “0” means programmed.
Note:
“1” means unprogrammed, “0” means programmed
24.5
Entering the Boot Loader Program
Entering the boot loader takes place by a jump or call from the application program. This may be initiated by a trigger such as a
command received via UART, or SPI interface. Alternatively, the boot reset fuse can be programmed so that the reset vector is
pointing to the boot flash start address after a reset. In this case, the boot loader is started after a reset. After the application
code is loaded, the program can start executing the application code. Note that the fuses cannot be changed by the MCU itself.
This means that once the boot reset fuse is programmed, the reset vector will always point to the boot loader reset and the fuse
can only be changed through the serial or parallel programming interface.
Note:
1.
“1” means unprogrammed, “0” means programmed
24.5.1 Store Program Memory Control and Status Register – SPMCSR
The store program memory control and status register contains the control bits needed to control the boot loader operations.
Table 24-2. Boot Lock Bit0 Protection Modes (Application Section)(1)
BLB0 Mode
BLB02
BLB01
Protection
1
No restrictions for SPM or LPM accessing the application section.
2
1
0
SPM is not allowed to write to the application section.
3
0
SPM is not allowed to write to the application section, and LPM executing from the boot
loader section is not allowed to read from the application section. If interrupt vectors are
placed in the boot loader section, interrupts are disabled while executing from the
application section.
4
0
1
LPM executing from the boot loader section is not allowed to read from the application
section. If interrupt vectors are placed in the boot loader section, interrupts are disabled
while executing from the application section.
Table 24-3. Boot Lock Bit1 Protection Modes (Boot Loader Section)(1)
BLB1 Mode
BLB12
BLB11
Protection
1
No restrictions for SPM or LPM accessing the boot loader section.
2
1
0
SPM is not allowed to write to the boot loader section.
3
0
SPM is not allowed to write to the boot loader section, and LPM executing from the
application section is not allowed to read from the boot loader section. If Interrupt
vectors are placed in the application section, interrupts are disabled while executing
from the boot loader section.
4
0
1
LPM executing from the application section is not allowed to read from the boot loader
section. If interrupt vectors are placed in the application section, interrupts are disabled
while executing from the boot loader section.
Table 24-4. Boot Reset Fuse(1) BOOTRST
Reset Address
1
Reset vector = Application reset (address 0x0000)
0
Bit
7
6
5
4
3
2
1
0
SPMIE
RWWSB SIGRD RWWSRE
BLBSET PGWRT
PGERS
SPMEN
SPMCSR
Read/Write
R/W
R
R/W
Initial Value
0