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參數資料
| 型號： | M38049FFLSP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 16.8 MHz, MICROCONTROLLER, PDIP64 |
| 封裝： | 17 X 56.40 MM, 1.78 MM HEIGHT, PLASTIC, SDIP-64 |
| 文件頁數： | 113/129頁 |
| 文件大?。?/td> | 1721K |
| 代理商： | M38049FFLSP |
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Rev.1.00
Oct 27, 2008
Page 84 of 128
REJ03B0266-0100
3804 Group (Spec.L)
Boot Mode
The control program for CPU rewrite mode must be written into
the User ROM or Boot ROM area in parallel I/O mode
beforehand. (If the control program is written into the Boot ROM
area, the standard serial I/O mode becomes unusable.)
See Figure 81 for details about the Boot ROM area.
Normal microcompu ter mo de is e n t e red when the
microcomputer is reset with pulling CNVSS pin low. In this case,
the CPU starts operating using the control program in the User
ROM area.
When the microcomputer is reset and the CNVSS pin high after
pulling the P45/TxD1 pin and CNVSS pin high, the CPU starts
operating (start address of program is stored into addresses
FFFC16 and FFFD16) using the control program in the Boot
ROM area. This mode is called the “Boot mode”. Also, User
ROM area can be rewritten using the control program in the Boot
ROM area.
Block Address
Block addresses refer to the maximum address of each block.
These addresses are used in the block erase command.
CPU Rewrite Mode
In CPU rewrite mode, the internal flash memory can be operated
on (read, program, or erase) under control of the Central
Processing Unit (CPU).
In CPU rewrite mode, only the User ROM area shown in Figure
81 can be rewritten; the Boot ROM area cannot be rewritten.
Make sure the program and block erase commands are issued for
only the User ROM area and each block area.
The control program for CPU rewrite mode can be stored in
either User ROM or Boot ROM area. In the CPU rewrite mode,
because the flash memory cannot be read from the CPU, the
rewrite control program must be transferred to internal RAM
area before it can be executed.
Fig. 81 Block diagram of built-in flash memory
Data block A:
2 Kbytes
Block 3: 24 Kbytes
Block 2: 16 Kbytes
Block 1: 8 Kbytes
Block 0: 8 Kbytes
FFFF16
E00016
C00016
800016
200016
180016
100016
User ROM area
Data block B:
2 Kbytes
SFR area
Internal RAM area
(2 Kbytes)
FFFF16
100016
0FFF16
0FE016
083F16
004016
000016
FFFF16
F00016
Boot ROM area
4 Kbytes
SFR area
Internal flash memory area
(60 Kbytes)
RAM
Notes 1: The boot ROM area can be rewritten
in a parallel I/O mode. (Access to
except boot ROM area is disabled.)
2: To specify a block, use the maximum
address in the block.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| M38049RLSS | 功能描述:DEV EMULATOR CHIP RAM 2KB 64SDIP RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 內電路編程器、仿真器以及調試器 系列:- 產品變化通告:Development Systems Discontinuation 19/Jul/2010 標準包裝:1 系列:* 類型:* 適用于相關產品:* 所含物品:* |
| M3806 | 功能描述:電纜固定件和配件 LTSCG 625 BLACK RoHS:否 制造商:Heyco 類型:Cable Grips, Liquid Tight 材料:Nylon 顏色:Black 安裝方法:Cable 最大光束直徑:11.4 mm 抗拉強度: |
| M3806 BK001 | 制造商:Alpha Wire Company 功能描述:CBL 8COND 18AWG BLK 1000' |
| M3806 BK002 | 制造商:Alpha Wire Company 功能描述:CBL 8COND 18AWG BLK 500' |
| M3806 BK005 | 制造商:Alpha Wire Company 功能描述:CBL 8COND 18AWG BLK 100' |
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