參數(shù)資料
型號: M37735MHBXXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 25 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 26/93頁
文件大?。?/td> 1802K
代理商: M37735MHBXXXFP
29
MITSUBISHI MICROCOMPUTERS
M37735MHBXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
Fig. 34 Pulse width measurement mode operation
(4) Clock timer
When the port-XC selection bit of the oscillation circuit control register
0 (refer to Figure 63) is set to “1” to make the sub-clock oscillation
circuit active, timer B2 can function as the clock timer, which uses
clock fC32 as the clock source. Clock fC32 is the sub clock (32 kHz)
divided by 32.
Additionally, when the port-Xc selection bit is set to “0” not to use the
sub-clock and the timer B2 clock source selection bit of the port
function control register (refer to Figure 11) is set to “1”, timer B2 can
functions as the clock timer, which uses clock fc32 as the clock source.
Clock fc32 is the main clock divided by 32.
Figure 35 shows the timer B2 mode register bit configuration when
timer B2 is used as the clock timer. As shown in Figure 35, the event
counter mode must be selected for timer B2.
For how to use the clock timer, refer to the section on clock generating
circuit.
(5) Internal connect mode
When the timer B1 internal connect selection bit of the port function
control register (refer to Figure 11) is set to “1”, timer B1 uses the
timer B2’s overflow signal as the clock source and timer B1 is internally
connected to timer B2 (cascade connection).
The internal connect mode makes timers B1 and B2 function as 16 +
16 bit-timer with the timer B2’s clock source.
Figure 35 shows the timer B1 mode register bit configuration when
using timer B1 in the internal connect mode. Set timer B1 in the event
counter mode as shown in Figure 35.
Fig. 35 Timer B1 mode register bit configuration when timer B1 is
used in the internal connect mode and timer B2 mode register
bit configuration when timer B2 is used as clock timer
Selected
clock source fi
TBiIN
Reload register
←Counter
Counter
←0
Count start
flag
Interrupt
request signal
Timer B2 mode register 5D16
0
1 : Always “01” in event
counter mode
02 3 4
5 6 7
1
!! ! ! 01 0 1
0
1 : Count at the rising
edge of input signal
!!!!: Not used in event
counter mode
Address
Timer B1 mode register 5C16
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