參數(shù)資料
型號(hào): M37373M8-XXXSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP52
封裝: 0.600 INCH, 1.778 MM PITCH, SHRINK, PLASTIC, DIP-52
文件頁數(shù): 88/110頁
文件大小: 1537K
代理商: M37373M8-XXXSP
79
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37273M8-XXXSP
M37273E8SP
A-D COMPARATOR CHARACTERISTICS
(VCC = 5 V ± 10 %, VSS = 0 V, f(XIN) = 8 MHz, Ta = –10 °C to 70 °C, unless otherwise noted)
Resolution
Non-linearity error
Differential non-linearity error
Zero transition error
Full-scale transition error
Max.
6
±1
±0.9
2
–2
bits
LSB
Min.
0
Limits
Typ.
Unit
Test conditions
Parameter
Symbol
VOT
VFST
IOL (SUM) = 0mA
MULTI-MASTER I2C-BUS BUS LINE CHARACTERISTICS
Bus free time
Hold time for START condition
LOW period of SCL clock
Rising time of both SCL and SDA signals
Data hold time
HIGH period of SCL clock
Falling time of both SCL and SDA signals
Data set-up time
Set-up time for repeated START condition
Set-up time for STOP condition
tBUF
tHD:STA
tLOW
tR
tHD:DAT
tHIGH
tF
tSU:DAT
tSU:STA
tSU:STO
Max.
1000
300
Min.
1.3
0.6
1.3
20+0.1Cb
0
0.6
20+0.1Cb
100
0.6
Max.
300
0.9
300
ms
ns
ms
ns
ms
Unit
Standard Clock Mode
High-speed Clock Mode
Parameter
Symbol
Note: Cb = total capacitance of 1 bus line
Min.
4.7
4.0
4.7
0
4.0
250
4.7
4.0
Fig. 84. Definition Diagram of Timing on Multi-master I2C-BUS
SDA
SCL
P
tBUF
S
tHD:STA
tLOW
tR
tHD:DAT
tHIGH
tF
tSU:DAT
tSU:STA
Sr
P
tSU:STO
tHD:STA
S
Sr
P
: Start condition
: Restart condition
: Stop condition
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