參數資料
型號: M37373M8-XXXSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP52
封裝: 0.600 INCH, 1.778 MM PITCH, SHRINK, PLASTIC, DIP-52
文件頁數: 24/110頁
文件大小: 1537K
代理商: M37373M8-XXXSP
20
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37273M8-XXXSP
M37273E8SP
SERIAL I/O
The M37273M8-XXXSP has a built-in serial I/O which can either trans-
mit or receive 8-bit data serially in the clock synchronous mode.
The serial I/O block diagram is shown in Figure 13. The synchronous
clock I/O pin (SCLK), and data output pin (SOUT), data input pin (SIN)
also functions as port P20, P21, P22 respectively.
Bit 2 of the serial I/O mode register (address 00EB16) selects whether
the synchronous clock is supplied internally or externally (from the
SCLK pin). When an internal clock is selected, bits 1 and 0 select
whether f(XIN) or f(XCIN) is divided by 8, 16, 32, or 64. To use SOUT,
SCLK, and SIN pins for serial I/O, set the corresponding bits of the
port P2 direction register to “0.”
The operation of the serial I/O is described below. The operation
differs depending on the clock source; external clock or internal clock.
Fig. 13. Serial I/O Block Diagram
8
Serial I/O shift register (8)
Data bus
Serial I/O
interrupt request
Selection gate: Connect to
black side at
reset.
Synchronous
circuit
Frequency divider
1/8
1/4
1/16
SM1
SM0
Serial I/O counter (8)
SM5 : LSB
MSB
S
SM2
1/2
XIN
SIN
SOUT
SCLK
1/2
XCIN
1/2
CM7
1/2
Note : When the data is set in the serial I/O register (address 00EA
(Note)
CM : CPU mode register
SM : Serial I/O mode register
16
), the register functions as the serial I/O shift register.
P20 Latch
SM3
P21 Latch
SM3
SM6
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