參數(shù)資料
型號(hào): M37373M8-XXXSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP52
封裝: 0.600 INCH, 1.778 MM PITCH, SHRINK, PLASTIC, DIP-52
文件頁(yè)數(shù): 80/110頁(yè)
文件大小: 1537K
代理商: M37373M8-XXXSP
71
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37273M8-XXXSP
M37273E8SP
ROM CORRECTION FUNCTION
This can correct program data in ROM. Up to 2 addresses (2 blocks)
can be corrected, a program for correction is stored in the ROM cor-
rection memory in RAM. The ROM memory for correction is 32 bytes
! 2 blocks.
Block 1 : addresses 030016 to 031F16
Block 2 : addresses 032016 to 033F16
Set an address of the ROM data to be corrected into the ROM cor-
rection address register. When the value of the counter matches the
ROM data address in the ROM correction address, the main pro-
gram branches to the correction program stored in the ROM memory
for correction. To return from the correction program to the main pro-
gram, the op code and operand of the JMP instruction (total of 3
bytes) are necessary at the end of the correction program. When the
blocks 1 and 2 are used in series, the above instruction is not needed
at the end of the block 1.
The ROM correction function is controlled by the ROM correction
enable register.
Notes 1 : Specify the first address (op code address) of each
instruction as the ROM correction address.
2 : Use the JMP instruction (total of 3 bytes) to return from
the main program to the correction program.
3 : Do not set the same ROM correction address to blocks
1 and 2.
Fig. 74. ROM Correction Address Registers
Fig. 75. ROM Correction Enable Register
020A16
ROM correction address 1 (high-order)
020B16
ROM correction address 1 (low-order)
020C16
ROM correction address 2 (high-order)
020D16
ROM correction address 2 (low-order)
7
ROM correction enable register
(RCR : address 020E 16)
0
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
Block 1 enable bit
Block 2 enable bit
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