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參數(shù)資料
| 型號： | M34501M4 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片4位微機的CMOS |
| 文件頁數(shù)： | 49/113頁 |
| 文件大?。?/td> | 1252K |
| 代理商： | M34501M4 |
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49
4501 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Note [2] on bit 3 of register I1
When the bit 3 of register I1 is cleared, the RAM back-up mode is
selected and the input of INT pin is disabled, be careful about the
following notes.
When the key-on wakeup function of port P1
3
is not used (regis-
ter K1
3
=
“
0
”
), clear bits 2 and 3 of register I1 before system
enters to the RAM back-up mode. (refer to Figure 48
).
LA
TI1A
DI
EPOF
POF
0
; (00
2
)
; Input of INT disabled........................
; RAM back-up
: these bits are not used here.
Fig. 48 External 0 interrupt program example-2
Note [3] on bit 2 of register I1
When the interrupt valid waveform of the P1
3
/INT pin is changed
with the bit 2 of register I1 in software, be careful about the fol-
lowing notes.
Depending on the input state of the P1
3
/INT pin, the external 0 in-
terrupt request flag (EXF0) may be set when the bit 2 of register
I1 is changed. In order to avoid the occurrence of an unexpected
interrupt, clear the bit 0 of register V1 to
“
0
”
(refer to Figure 49
)
and then, change the bit 2 of register I1.
In addition, execute the SNZ0 instruction to clear the EXF0 flag
after executing at least one instruction (refer to Figure 49
).
Also, set the NOP instruction for the case when a skip is per-
formed with the SNZ0 instruction (refer to Figure 49
).
LA
TV1A
LA
TI1A
NOP
SNZ0
4
; (
0
2
)
; The SNZ0 instruction is valid...........
12
; Interrupt valid waveform is changed
...........................................................
; The SNZ0 instruction is executed
(EXF0 flag cleared)
...........................................................
NOP
: these bits are not used here.
Fig. 49 External 0 interrupt program example-3
Power-on reset
Reset can be automatically performed at power on (power-on re-
set) by the built-in power-on reset circuit. When the built-in
power-on reset circuit is used, the time for the supply voltage to
rise from 0 V to 2.0 V must be set to 100
μ
s or less. If the rising
time exceeds 100
μ
s, connect a capacitor between the RESET
pin and V
SS
at the shortest distance, and input
“
L
”
level to RE-
SET pin until the value of supply voltage reaches the minimum
operating voltage.
Clock control
Execute the CMCK or the CRCK instruction in the initial setting
routine of program (executing it in addres 0 in page 0 is recom-
mended).
The oscillation circuit by the CMCK or CRCK instruction can be
selected only at once. The oscillation circuit corresponding to the
first executed one of these two instruction is valid. Other oscilla-
tion circuits and the ring oscillator stop.
Ring oscillator
The clock frequency of the ring oscillator depends on the supply
voltage and the operation temperature range.
Be careful that variable frequencies when designing application
products.
Also, the oscillation stabilize wait time after system is released
from reset is generated by the ring oscillator clock. When consid-
ering the oscillation stabilize wait time after system is released
from reset, be careful that the variable frequency of the ring oscil-
lator clock.
External clock
When the external signal clock is used as the source oscillation
(f(X
IN
)), note that the RAM back-up mode (POF and POF2 in-
structions) cannot be used.
15
16
17
18
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