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參數(shù)資料
| 型號： | M34501M4 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片4位微機(jī)的CMOS |
| 文件頁數(shù)： | 32/113頁 |
| 文件大小： | 1252K |
| 代理商： | M34501M4 |
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32
4501 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Q1
3
Q1
2
A-D control register Q1
A-D operation mode selection bit
Not used
Analog input pin selection bits
at reset : 0000
2
at RAM back-up : state retained
0
1
0
1
Q1
1
0
0
1
1
A-D conversion mode
Comparator mode
This bit has no function, but read/write is enabled.
Selected pins
A
IN0
A
IN1
Not available
Not available
Note:
“
R
”
represents read enabled, and
“
W
”
represents write enabled.
Q1
0
0
1
0
1
(1) Operating at A-D conversion mode
The A-D conversion mode is set by setting the bit 3 of register Q1 to
“
0.
”
(2) Successive comparison register AD
Register AD stores the A-D conversion result of an analog input in
10-bit digital data format. The contents of the high-order 8 bits of
this register can be stored in register B and register A with the
TABAD instruction. The contents of the low-order 2 bits of this reg-
ister can be stored into the high-order 2 bits of register A with the
TALA instruction. However, do not execute these instructions dur-
ing A-D conversion.
When the contents of register AD is n, the logic value of the com-
parison voltage V
ref
generated from the built-in DA converter can
be obtained with the reference voltage V
DD
by the following for-
mula:
Logic value of comparison voltage V
ref
V
ref
=
n
n: The value of register AD (n = 0 to 1023)
V
DD
1024
R/W
Table 12 A-D control registers
(3) A-D conversion completion flag (ADF)
A-D conversion completion flag (ADF) is set to
“
1
”
when A-D con-
version completes. The state of ADF flag can be examined with the
skip instruction (SNZAD). Use the interrupt control register V2 to
select the interrupt or the skip instruction.
The ADF flag is cleared to
“
0
”
when the interrupt occurs or when
the next instruction is skipped with the skip instruction.
(4) A-D conversion start instruction (ADST)
A-D conversion starts when the ADST instruction is executed. The
conversion result is automatically stored in the register AD.
(5) A-D control register Q1
Register Q1 is used to select the operation mode and one of ana-
log input pins.
Q1
1
Q1
0
(6) Operation description
A-D conversion is started with the A-D conversion start instruction
(ADST). The internal operation during A-D conversion is as follows:
When the A-D conversion starts, the register AD is cleared to
“
000
16
.
”
Next, the topmost bit of the register AD is set to
“
1,
”
and the
comparison voltage V
ref
is compared with the analog input volt-
age V
IN
.
When the comparison result is V
ref
< V
IN
, the topmost bit of the
register AD remains set to
“
1.
”
When the comparison result is
V
ref
> V
IN
, it is cleared to
“
0.
”
The 4501 Group repeats this operation to the lowermost bit of the
register AD to convert an analog value to a digital value. A-D con-
version stops after 62 machine cycles (46.5
μ
s when f(X
IN
) = 4.0
MHz in high-speed mode) from the start, and the conversion result
is stored in the register AD. An A-D interrupt activated condition is
satisfied and the ADF flag is set to
“
1
”
as soon as A-D conversion
completes (Figure 28).
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|---|---|
| M34501M4-XXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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| M34502E4FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES |
| M34502M2 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34502M2-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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