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參數(shù)資料
| 型號： | M34501M4 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片4位微機(jī)的CMOS |
| 文件頁數(shù)： | 47/113頁 |
| 文件大小： | 1252K |
| 代理商： | M34501M4 |
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47
4501 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
(5) External clock
When the external signal clock is used as the source oscillation
(f(X
IN
)), connect the X
IN
pin to the clock source and leave X
OUT
pin
open. Then, execute the CMCK instruction (Figure 46).
Be careful that the maximum value of the oscillation frequency
when using the external clock differs from the value when using the
ceramic resonator (refer to the recommended operating condition).
Also, note that the RAM back-up mode (POF and POF2 instruc-
tions) cannot be used when using the external clock.
(6) Clock control register MR
Register MR controls system clock. Set the contents of this register
through register A with the TMRA instruction. In addition, the TAMR
instruction can be used to transfer the contents of register MR to
register A.
Table 19 Clock control register MR
Fig. 46 External clock input circuit
ROM ORDERING METHOD
Please submit the information described below when ordering
Mask ROM.
(1) Mask ROM Order Confirmation Form ..................................... 1
(2) Data to be written into mask ROM ...............................EPROM
(three sets containing the identical data)
(3) Mark Specification Form .......................................................... 1
Note :
“
R
”
represents read enabled, and
“
W
”
represents write enabled.
MR
3
Clock control register MR
System clock
f(X
IN
) (high-speed mode)
f(X
IN
)/2 (middle-speed mode)
f(X
IN
)/4 (low-speed mode)
f(X
IN
)/8 (default mode)
This bit has no function, but read/write is enabled.
This bit has no function, but read/write is enabled.
at reset : 1100
2
at RAM back-up : 1100
2
MR
3
0
0
1
1
R/W
Not used
Not used
System clock selection bits
0
1
0
1
MR
2
0
1
0
1
MR
1
MR
0
MR
2
4501
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