參數(shù)資料
型號： M34501M4
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述： 單芯片4位微機的CMOS
文件頁數(shù)： 44/113頁
文件大小： 1252K
代理商： M34501M4
44
4501 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PU0
3
PU0
2
PU0
1
PU0
0
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Port P0
3
pull-up transistor
control bit
Port P0
2
pull-up transistor
control bit
Port P0
1
pull-up transistor
control bit
Port P0
0
pull-up transistor
control bit
Pull-up control register PU0
at reset : 0000
2
at RAM back-up : state retained
0
1
0
1
0
1
0
1
W
Table 18 Pull-up control register and interrupt control register
PU1
3
PU1
2
PU1
1
PU1
0
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Port P1
3
/INT pull-up transistor
control bit
Port P1
2
/CNTR pull-up transistor
control bit
Port P1
1
pull-up transistor
control bit
Port P1
0
pull-up transistor
control bit
Pull-up control register PU1
at reset : 0000
2
at RAM back-up : state retained
0
1
0
1
0
1
0
1
W
PU2
3
PU2
2
PU2
1
PU2
0
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Port D
3
/K pull-up transistor
control bit
Port D
2
/C pull-up transistor
control bit
Port P2
1
/A
IN1
pull-up transistor
control bit
Port P2
0
/A
IN0
pull-up transistor
control bit
Pull-up control register PU2
at reset : 0000
2
at RAM back-up : state retained
0
1
0
1
0
1
0
1
W
I1
3
I1
2
I1
1
I1
0
INT pin input control bit (Note 2)
Interrupt valid waveform for INT pin/
return level selection bit (Note 2)
INT pin edge detection circuit control bit
INT pin
timer 1 control enable bit
Notes 1:
“
R
”
represents read enabled, and
“
W
”
represents write enabled.
2: When the contents of I1
2
and I1
3
are changed, the external interrupt request flag EXF0 may be set. Accordingly, clear EXF0 flag with the SNZ0 in-
struction when the bit 0 (V1
0
) of register V1 to
“
0
”
. In this time, set the NOP instruction after the SNZ0 instruction, for the case when a skip is
performed with the SNZ0 instruction.
Interrupt control register I1
R/W
at RAM back-up : state retained
at reset : 0000
2
INT pin input disabled
INT pin input enabled
Falling waveform (
“
L
”
level of INT pin is recognized with the SNZI0
instruction)/
“
L
”
level
Rising waveform (
“
H
”
level of INT pin is recognized with the SNZI0
instruction)/
“
H
”
level
One-sided edge detected
Both edges detected
Disabled
Enabled
0
1
0
1
0
1
0
1
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M34513M2 Hook-Up Wire; Conductor Size AWG:26; No. Strands x Strand Size:7 x 34; Jacket Color:White; Approval Bodies:UL, CSA; Approval Categories:UL AWM Style 1061; CSA AWM; Conductor Material:Copper; Jacket Material:Polyvinylchloride (PVC) RoHS Compliant: Yes
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