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參數(shù)資料
| 型號： | M34280E1GP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | 0.225 INCH, 0.65 MM PITCH, PLASTIC, SSOP-20 |
| 文件頁數(shù)： | 44/48頁 |
| 文件大?。?/td> | 605K |
| 代理商： | M34280E1GP |
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Interrupt
Mitsubishi microcomputers
M16C / 62N Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
47
Saving Registers
In the interrupt sequence, only the contents of the flag register (FLG) and that of the program counter
(PC) are saved in the stack area.
First, the processor saves the four higher-order bits of the program counter, and 4 upper-order bits and 8
lower-order bits of the FLG register, 16 bits in total, in the stack area, then saves 16 lower-order bits of the
program counter. Figure 1.10.6 shows the state of the stack as it was before the acceptance of the
interrupt request, and the state the stack after the acceptance of the interrupt request.
Save other necessary registers at the beginning of the interrupt routine using software. Using the
PUSHM instruction alone can save all the registers except the stack pointer (SP).
Address
Content of previous stack
Stack area
[SP]
Stack pointer
value before
interrupt occurs
m
m – 1
m – 2
m – 3
m – 4
Stack status before interrupt request
is acknowledged
Stack status after interrupt request
is acknowledged
Content of previous stack
m + 1
MSB
LSB
m
m – 1
m – 2
m – 3
m – 4
Address
Flag register (FLGL)
Content of previous stack
Stack area
Flag register
(FLGH)
Program
counter (PCH)
[SP]
New stack
pointer value
Content of previous stack
m + 1
MSB
LSB
Program counter (PCL)
Program counter (PCM)
Figure 1.10.6. State of stack before and after acceptance of interrupt request
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| M34501M2-XXXFP | 4-BIT, MROM, MICROCONTROLLER, PDSO20 |
| M34501E4FP | 4-BIT, OTPROM, MICROCONTROLLER, PDSO20 |
| M34501M4-XXXFP | 4-BIT, MROM, MICROCONTROLLER, PDSO20 |
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