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參數資料
| 型號： | M34280E1GP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | 0.225 INCH, 0.65 MM PITCH, PLASTIC, SSOP-20 |
| 文件頁數： | 24/48頁 |
| 文件大小： | 605K |
| 代理商： | M34280E1GP |
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Skip condition
Detailed description
Carry
flag
CY
29
28
Instruction code
Function
Mnemonic
Hexadecimal
notation
Number
of
words
Number
of
cycles
Parameter
Type of
instructions
D8 D7 D6 D5 D4 D3 D2 D1 D0
MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
LA n
TABP p
AM
AMC
A n
SC
RC
SZC
CMA
RAR
LGOP
(A)
← n
n = 0 to 15
(SK(SP))
← (PC)
(SP)
← (SP) + 1
(PCH)
← p, p=0 to 7
(PCL)
← (DR2–DR0, A3–A0)
When URS=0,
(B)
← (ROM(PC))7 to 4
(A)
← (ROM(PC))3 to 0
When URS=1,
(CY)
← (ROM(PC))8
(B)
← (ROM(PC))7 to 4
(A)
← (ROM(PC))3 to 0
(SP)
← (SP) – 1
(PC)
← (SK(SP))
(A)
← (A) + (M(DP))
(A)
← (A) + (M(DP))+ (CY)
(CY)
← Carry
(A)
← (A) + n
n = 0 to 15
(CY)
← 1
(CY)
← 0
(CY) = 0 ?
(A)
← (A)
→ CY → A3A2A1A0
Logic operation instruction XOR, OR, AND
Continuous
description
–
Overflow = 0
–
(CY) = 0
–
0/1
–
0/1
–
1
0
–
0/1
–
Loads the value n in the immediate field to register A.
When the LA instructions are continuously coded and executed, only the first LA instruction is executed
and other LA instructions coded continuously are skipped.
Transfers bits 7 to 4 to register B and bits 3 to 0 to register A when URS flag is cleared to “0.” These bits
7 to 0 are the ROM pattern in address (DR2 DR1 DR0 A3 A2 A1 A0) specified by registers A and D in
page p.
When this instruction is executed, 1 stage of stack register is used.
Transfers bit 8 of ROM pattern is transferred to flag CY when URS flag is set to “1” (after the URSC
instruction is executed).
One of stack is used when the TABP p instruction is executed.
Adds the contents of M(DP) to register A. Stores the result in register A. The contents of carry flag CY
remains unchanged.
Adds the contents of M(DP) and carry flag CY to register A. Stores the result in register A and carry flag
CY.
Adds the value n in the immediate field to register A.
The contents of carry flag CY remains unchanged.
Skips the next instruction when there is no overflow as the result of operation.
Sets (1) to carry flag CY.
Clears (0) to carry flag CY.
Skips the next instruction when the contents of carry flag CY is “0.”
Stores the one‘s complement for register A‘s contents in register A.
Rotates 1 bit of the contents of register A including the contents of carry flag CY to the right.
Execute the logic operation selected by logic operation selection register LO between the contents of
register A and register E, and stores the result in register A.
Arithmetic
operation
0B
n
09
p
00
A
00
B
0A
n
00
7
00
6
02
F
01
C
01
D
04
1
3
1
0101
1n3 n2 n1 n0
0100
10p2 p1 p0
0000
01010
0000
01011
0101
0n3 n2 n1 n0
0000
00111
0000
00110
0001
01111
0000
11100
0000
11101
0010
00001
MACHINE INSTRUCTIONS (CONTINUED)
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