參數(shù)資料
型號(hào): M34280E1GP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDSO20
封裝: 0.225 INCH, 0.65 MM PITCH, PLASTIC, SSOP-20
文件頁(yè)數(shù): 33/48頁(yè)
文件大小: 605K
代理商: M34280E1GP
Interrupt
Mitsubishi microcomputers
M16C / 62N Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
37
Software Interrupts
A software interrupt occurs when executing certain instructions. Software interrupts are non-maskable
interrupts.
Undefined instruction interrupt
An undefined instruction interrupt occurs when executing the UND instruction.
Overflow interrupt
An overflow interrupt occurs when executing the INTO instruction with the overflow flag (O flag) set to
“1”. The following are instructions whose O flag changes by arithmetic:
ABS, ADC, ADCF, ADD, CMP, DIV, DIVU, DIVX, NEG, RMPA, SBB, SHA, SUB
BRK interrupt
A BRK interrupt occurs when executing the BRK instruction.
INT instruction interrupt
An INT interrupt occurs when assiging one of software interrupt numbers 0 through 63 and executing
the INT instruction. Software interrupt numbers 0 through 31 are assigned to peripheral I/O interrupts,
so executing the INT instruction allows executing the same interrupt routine that a peripheral I/O
interrupt does.
The stack pointer (SP) used for the INT interrupt is dependent on which software interrupt number is
involved.
So far as software interrupt numbers 0 through 31 are concerned, the microcomputer saves the stack
pointer assignment flag (U flag) when it accepts an interrupt request. If change the U flag to “0” and
select the interrupt stack pointer (ISP), and then execute an interrupt sequence. When returning from
the interrupt routine, the U flag is returned to the state it was before the acceptance of interrupt re-
quest. So far as software numbers 32 through 63 are concerned, the stack pointer does not make a
shift.
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