參數(shù)資料
型號(hào): M34280E1GP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDSO20
封裝: 0.225 INCH, 0.65 MM PITCH, PLASTIC, SSOP-20
文件頁(yè)數(shù): 13/48頁(yè)
文件大?。?/td> 605K
代理商: M34280E1GP
17
MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
(1) Internal state at reset
Table 6 shows port state at reset, and Figure 19 shows internal
state at reset (they are retained after system is released from
reset).
The contents of timers, registers, flags and RAM except shown
in Figure 19 are undefined, so set the initial value to them.
Program counter (PC) ..............................................................
Address 0 in page 0 is set to program counter.
Power down flag (P) .................................................................
Timer 1 underflow flag (T1F) ...................................................
Timer control register V1 ..........................................................
Carrier wave selection register C ............................................
Pull-down control register PU0 ................................................
Logic operation selection register LO ......................................
Most significant ROM code reference enable flag (URS)
Carry flag (CY) .........................................................................
Register A .................................................................................
Register B .................................................................................
Stack pointer (SP) ....................................................................
000
00
000
00
0
000
111
000
00
0
111
1
111
1
11
Fig. 19 Internal state at reset
Table 6 Port state at reset
Name
D0–D6
D7
G0–G3, E2
E0, E1
State at reset
“H” output
Input port (Pull-down transistor ON)
Input circuit OFF (Pull-down transistor OFF)
State after system is released from reset
High impedance state
Input circuit OFF (Pull-down transistor OFF)
Input port (Pull-down transistor ON)
Input port (Pull-down transistor OFF)
Note: The contents of all output latch is initialized to “0.”
VOLTAGE DROP DETECTION CIRCUIT
The built-in drop detection circuit is designed to detect a drop in
voltage at operating and to reset the microcomputer if the supply
voltage drops below the specified value (Typ. 1.50 V) or less.
Fig. 20 Voltage drop detection circuit operation waveform
VDD
Reset voltage
Internal reset signal
Microcomputer starts operation
after f(XIN) is counted to 16384 times.
The voltage drop detection circuit is stopped and power
dissipation is reduced at the RAM back-up mode, when the
functions except the RAM and pull-down control register (PU0)
are initialized.
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