13.2 CAN Module Related Registers
CAN MODULE
13
13-42
32192/32195/32196 Group Hardware Manual
Rev.1.10 REJ09B0123-0110 Apr.06.07
CAN0 Slot Interrupt Request Mask Register (CAN0SLIMKW)
<Address: H’0080 1010>
CAN1 Slot Interrupt Request Mask Register (CAN1SLIMKW)
<Address: H’0080 1410>
b0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
b15
IRB0
IRB1
IRB2
IRB3
IRB4
IRB6
IRB7
IRB8
IRB9
IRB10
IRB11
IRB12
IRB13
IRB14
IRB15
IRB5
0000000000000000
b16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
b31
IRB16
IRB17
IRB18
IRB19
IRB20
IRB22
IRB23
IRB24
IRB25
IRB26
IRB27
IRB28
IRB29
IRB30
IRB31
IRB21
0000000000000000
<Upon exiting reset: H’0000 0000>
b
Bit Name
Function
R
W
0
IRB0 (slot 0 interrupt request mask bit)
0: Mask (disable) interrupt request
R
W
1
IRB1 (slot 1 interrupt request mask bit)
1: Enable interrupt request
2
IRB2 (slot 2 interrupt request mask bit)
3
IRB3 (slot 3 interrupt request mask bit)
4
IRB4 (slot 4 interrupt request mask bit)
5
IRB5 (slot 5 interrupt request mask bit)
6
IRB6 (slot 6 interrupt request mask bit)
7
IRB7 (slot 7 interrupt request mask bit)
8
IRB8 (slot 8 interrupt request mask bit)
9
IRB9 (slot 9 interrupt request mask bit)
10
IRB10 (slot 10 interrupt request mask bit)
11
IRB11 (slot 11 interrupt request mask bit)
12
IRB12 (slot 12 interrupt request mask bit)
13
IRB13 (slot 13 interrupt request mask bit)
14
IRB14 (slot 14 interrupt request mask bit)
15
IRB15 (slot 15 interrupt request mask bit)
16
IRB16 (slot 16 interrupt request mask bit)
17
IRB17 (slot 17 interrupt request mask bit)
18
IRB18 (slot 18 interrupt request mask bit)
19
IRB19 (slot 19 interrupt request mask bit)
20
IRB20 (slot 20 interrupt request mask bit)
21
IRB21 (slot 21 interrupt request mask bit)
22
IRB22 (slot 22 interrupt request mask bit)
23
IRB23 (slot 23 interrupt request mask bit)
24
IRB24 (slot 24 interrupt request mask bit)
25
IRB25 (slot 25 interrupt request mask bit)
26
IRB26 (slot 26 interrupt request mask bit)
27
IRB27 (slot 27 interrupt request mask bit)
28
IRB28 (slot 28 interrupt request mask bit)
29
IRB29 (slot 29 interrupt request mask bit)
30
IRB30 (slot 30 interrupt request mask bit)
31
IRB31 (slot 31 interrupt request mask bit)
This register is used to enable or disable the interrupt requests that will be generated when data transmission or
reception in each corresponding slot is completed. Setting IRBn (n = 0–31) to "1" enables the interrupt request to
be generated when data transmission or reception in the corresponding slot is completed. The CAN Slot Interrupt
Request Status Register (CAN0SLISTW, CAN1SLISTW) helps to know which slot requested the interrupt.