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10.8 TOU (Output-Related 24-Bit Timer)
MULTIJUNCTION TIMERS
10
32192/32195/32196 Group Hardware Manual
Rev.1.10 REJ09B0123-0110 Apr.06.07
Figure 10.8.23 Schematic Operation for the Case Where the Output is Fixed Forcibly in Software
H'FFFF
H'0000
Undefined
value
H'FFFF
H'0000
H'0010
Count clock
Enable bit
Counter
Enable bit
Reload register
Counter
Shorting-prevention period
TOUn_0 (2, 4) F/F output
TOUn_1 (3, 5) F/F output
TOUn_0 (2, 4)
TOUn_1 (3, 5)
Enabled
(By writing to the enble bit
or by external input)
H'(0010-1)
(Note 3)
H'(0010-1)
(Note 3)
Count down from the
reload register set value
H'0010
Count down from the
reload register set value
Undefined
(1) Count stop
(TOUn_0 (2, 4),
TOUn_1 (3, 5))
(2) Writing F/F data/
shorting-prevention
F/F data
(3) Count enable
(TOUn_1 (3, 5))
F/F data
value output
Shorting-
prevention
F/F data value
output
Note 1: The value that "reload0 register - 1" is reloaded.
Note 2: The value that "reload1 register - 1" is reloaded.
Note 3: The value that "reload register - 1" is reloaded.
Note: This diagram does not show detailed timing information.
(Note 1)
(Note 2)
