deveopmen
DMAC
Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C/80 (100-pin version) group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
79
DMAi request cause select register (i = 0 to 3)(Note 1)
Symbol
DMiSL
Address
When reset
0X000000
2
0378
16
to 037B
16
Function
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
DMA request cause
select bit
DSEL0
A
DSEL1
DSEL2
DSEL3
Nothing is assigned.
When write, set "0". When read, the value of these bits is indeterminate.
Software DMA
request bit
(Note 5)
If software trigger is selected, a
DMA request is generated by
setting this bit to “1” (When read,
the value of this bit is always “0”)
DSR
b4 b3 b2 b1 b0
0 0 0 0 0 : Software trigger
0 0 0 0 1 : Falling edge of INTi pin (Note 3)
0 0 0 1 0 : Two edges of INTi pin (Note 3)
0 0 0 1 1 : Timer A0
0 0 1 0 0 : Timer A1
0 0 1 0 1 : Timer A2
0 0 1 1 0 : Timer A3
0 0 1 1 1 : Timer A4
0 1 0 0 0 : Timer B0
0 1 0 0 1 : Timer B1
0 1 0 1 0 : Timer B2
0 1 0 1 1 : Timer B3
0 1 1 0 0 : Timer B4
0 1 1 0 1 : Timer B5
0 1 1 1 0 : UART0 transmit
0 1 1 1 1 : UART0 receive
1 0 0 0 0 : UART1 transmit
1 0 0 0 1 : UART1 receive
1 0 0 1 0 : UART2 transmit
1 0 0 1 1 : UART2 receive/ACK (Note 4)
1 0 1 0 0 : UART3 transmit
1 0 1 0 1 : UART3 receive/ACK (Note 4)
1 0 1 1 0 : UART4 transmit
1 0 1 1 1 : UART4 receive/ACK (Note 4)
1 1 0 0 0 : A-D conversion
1 1 0 0 1 to 1 1 1 1 1 : Inhibit
A
AA
A
A
A
AA
A
A
A
AA
Bit name
DMA request bit
(Note 5,6)
DRQ
0 : Not requested
1 : Requested
AA
Note 1: Please refer to DMAC precautions.
Note 2: Set DMA inhibit before changing the DMA request cause. Set DRQ to "1"
simultaneously.
e.g.) MOV.B #083h, DMiSL
Note 3: DMA0-INT0, DMA1-INT1, DMA2-INT2, and DMA3-INT3 correspond to DMAi and
INTi. However, when INT3 pin becomes data bus in microprocessor mode, DMA3-
INT3 cannot be used.
Note 4: UARTi reception and ACK switching are effected using the UARTi special mode
register and UARTi special mode register 2.
Note 5: When setting DSR to "1", set DRQ to "1" using OR instruction etc. simultaneously.
e.g.) OR.B #0A0h, DMiSL
Note 6: Do not write "0" to this bit. There is no need to clear the DMA request bit.
; Set timer A0
(Note 2)
DSEL4
AA
Figure 1.11.2. DMAC register (1)