
92
Mitsubishi microcomputers
M30240 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Specifications REV. G
Specifications in this manual are tentative and subject to change
UART0 to UART2
Figure 1.87: UARTi transmit/receive mode register.
Table 1.28 lists the functions of the input/output pins during UART mode. Note that for a period from
when the UARTi operation mode is selected to when transfer starts, the TxDi pin outputs a “H”.
Table 1.28:
Input/output pin functions in UART mode
Pin name
Function
Method of selection
TxDi
(P63, P67, P70)
Serial data
output
Outputs dummy data when performing reception.
RxDi
(P62, P66, P71)
Serial data input
Port P62, P66, and P71 direction register (bits 2 and 6 at address 03EE16 bit 1 at address
03EF16)= “0”
(Can be used as an input port when performing transmission only.)
CLKi
(P61, P65, P72)
Programmable I/
O port
Internal/external clock select bit (bit 3 at address 03A016, 03A816, 037816) = “0”
Transfer clock
input
Internal/external clock select bit (bit 3 at address 03A016, 03A816) = “1”
Port P61, P65 direction register (bits 1 and 5 at address 03EE16) = “0”
CTSi/RTSi
(P60,P64,P73)
CTS input
CTS/RTS disable bit (bit 4 at address 03A416, 03AC16, 037C16) = “0”
CTS/RTS function select bit (bit 2 at address 03A416, 03AC16, 037C16) = “0”
Port P60, P64 and P73 direction register (bits 0 and 4 at address 03EE16, bit 3 at address
03EF16) = “0”
RTS output
CTS/RTS disable bit (bit 4 at address 03A416, 03AC16, 037C16) = “0”
CTS/RTS function select bit (bit 2 at address 03A416, 03AC16, 037C16) = “1”
Programmable I/
O port
CTS/RTS disable bit (bit 4 at address 03A416, 03AC16, 037C16) = “1”
Symbol
Address
When reset
UiMR(i=0,1)
03A016, 03A816
0016
CKDIR
UARTi transmit / receive mode registers
Internal / external clock
select bit
STPS
PRY
PRYE
SLEP
0 : Internal clock
1 : External clock (Note)
Bit name
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
SMD0
SMD1
SMD2
Serial I/O mode select bit
b2 b1 b0
0 : One stop bit
1 : Two stop bits
0 : Parity disabled
1 : Parity enabled
0 : Sleep mode deselected
1 : Sleep mode selected
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
Valid when bit 6 = “1”
0 : Odd parity
1 : Even parity
Stop bit length select bit
Odd / even parity
select bit
Parity enable bit
Sleep select bit
Symbol
Address
When reset
U2MR
037816
0016
CKDIR
UART2 transmit / receive mode register
Internal / external clock
select bit
STPS
PRY
PRYE
IOPOL
Must always be fixed to “0”
Bit name
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
SMD0
SMD1
SMD2
Serial I/O mode select bit
b2 b1 b0
0 : One stop bit
1 : Two stop bits
0 : Parity disabled
1 : Parity enabled
0 : No reverse
1 : Reverse
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
Valid when bit 6 = “1”
0 : Odd parity
1 : Even parity
Stop bit length select bit
Odd / even parity
select bit
Parity enable bit
TxD, RxD I/O polarity
reverse bit (Note)
Note: Usually set to “0”.
Note: Set the corresponding port direction register to "0".