參數(shù)資料
型號(hào): M30100
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述: 單片16位CMOS微機(jī)
文件頁(yè)數(shù): 55/164頁(yè)
文件大小: 3302K
代理商: M30100
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deveopment
Tentative Specifications REV.E1
Interrupts
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
54
(address 004D
16
)
Key input interrupt
request
Port P1
0
-P1
3
pull-up select bit
Pull-up
transistor
Port P1
0
direction register
Pull-up
transistor
Pull-up
transistor
Pull-up
transistor
P1
3
/KI
3
P1
2
/KI
2
P1
1
/KI
1
P1
0
/KI
0
Interrupt control
circuit
Key input interrupt control register
K1
0
input enable bit
K1
0
input
polarity
1
Port P1
K1
1
input enable bit
1
input
K1
select bit
Port P1
2
direction register
K1
2
input enable bit
2
input
K1
select bit
3
Port P1
K1
3
input enable bit
3
input polarity
K1
Port P1
3
direction register
Key input enable register
AAA
Bit name
Function
Bit symbol
Symbol
KIEN
Address
0098
16
When reset
00
16
KI0EN
b7
b6
b5
b4
b3
b2
b1
b0
AAA
KI0 input enable bit
0 : Disabled
1 : Enabled
0 : Falling edge
1 : Rising edges
0 : Disabled
1 : Enabled
0 : Falling edge
1 : Rising edges
0 : Disabled
1 : Enabled
KI0 input polarity select bit
KI1 input enable bit
KI1 input polarity select bit
KI2 input enable bit
KI2 input polarity select bit
0 : Falling edge
1 : Rising edges
KI0PL
KI1EN
KI1PL
KI2EN
KI2PL
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
KI3 input enable bit
0 : Disabled
1 : Enabled
KI3EN
KI3 input polarity select bit
0 : Falling edge
1 : Rising edges
KI3PL
Key Input Interrupt
When the direction register of any of P1
0
to P1
3
is set for input and the KIi (i=0 to 3) input enable bit of this
port is set for enabled, if a falling or rising edge is input to that port, a key input interrupt is generated. A key
input interrupt can also be used as a key-on wakeup function for cancelling the wait mode or stop mode.
Figure 1.12.14 shows the block diagram of the key input interrupts. When the appropriate signal (“L” for a
pin that has falling edge selected and “H” for a pin that has rising edge selected) is input to a pin for the
input inhibit process has not been executed, inputs to the other pins are not detected as interrupts.
You should overwrite the KIi (i=0 to 3) input polarity select bit or the KIi (i =0 to 3) input enable bit only under
conditions where the key input interrupt is disabled. After overwriting the KIi (i=0 to 3) input polarity select
bit or the KIi (i=0 to 3) input enable bit, clear the interrupt request bit, and then enable the key input interrupt.
Figure 1.12.14. Block diagram of key input interrupt
Figure 1.12.15. Key input enable register
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