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參數(shù)資料
| 型號： | M12L64164A-5BG |
| 廠商： | ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | 1M x 16 Bit x 4 Banks Synchronous DRAM |
| 中文描述： | 4M X 16 SYNCHRONOUS DRAM, 4.5 ns, PBGA54 |
| 封裝： | 8 X 8 MM, LEAD FREE, VBGA-54 |
| 文件頁數(shù)： | 9/45頁 |
| 文件大小： | 831K |
| 代理商： | M12L64164A-5BG |
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ES MT
MODE REGISTER FIELD TABLE TO PROGRAM MODES
Register Programmed with MRS
M12L64164A
Elite Semiconductor Memory Technology Inc.
Revision
:
3.0
Publication Date
:
Mar. 2007
9/45
Address
A13~A12
A11~A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Function
RFU
RFU
W.B.L
TM
CAS Latency
BT
Burst Length
Test Mode
CAS Latency
Burst Type
Burst Length
A8
A7
Type
A6
A5
A4
Latency
A3
Type
A2
A1
A0
BT = 0
BT = 1
0
0
Mode Register Set
0
0
0
Reserved
0
Sequential
0
0
0
1
1
0
1
Reserved
0
0
1
Reserved
1
Interleave
0
0
1
2
2
1
0
Reserved
0
1
0
2
0
1
0
4
4
1
1
Reserved
0
1
1
3
0
1
1
8
8
Write Burst Length
1
0
0
Reserved
1
0
0
Reserved Reserved
A9
Length
1
0
1
Reserved
1
0
1
Reserved Reserved
0
Burst
1
1
0
Reserved
1
1
0
Reserved Reserved
1
Single Bit
1
1
1
Reserved
1
1
1
Full Page Reserved
Full Page Length : 256
POWER UP SEQUENCE
1.Apply power and start clock, Attempt to maintain CKE = ”H”, DQM = ”H” and the other pin are NOP condition at the inputs.
2. Maintain stable power , stable clock and NOP input condition for a minimum of 200us.
3. Issue precharge commands for all banks of the devices.
4. Issue 2 or more auto-refresh commands.
5. Issue mode register set command to initialize the mode register.
cf.) Sequence of 4 & 5 is regardless of the order.
The device is now ready for normal operation.
Note : 1. RFU(Reserved for future use) should stay “0” during MRS cycle.
2. If A9 is high during MRS cycle, “Burst Read Single Bit Write” function will be enabled.
3. The full column burst (256 bit) is available only at sequential mode of burst type.
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PDF描述 |
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| M12L64164A-6BG | 1M x 16 Bit x 4 Banks Synchronous DRAM |
| M12L64164A-7BG | 1M x 16 Bit x 4 Banks Synchronous DRAM |
| M12L64322A-5BG | 512K x 32 Bit x 4 Banks Synchronous DRAM |
| M12L64322A-5TG | 512K x 32 Bit x 4 Banks Synchronous DRAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M12L64164A-5BG2Y | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16 Bit x 4 Banks |
| M12L64164A-5BIG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16 Bit x 4 Banks Synchronous DRAM |
| M12L64164A-5TG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16 Bit x 4 Banks Synchronous DRAM |
| M12L64164A-5TG2Y | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16 Bit x 4 Banks |
| M12L64164A-5TIG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16 Bit x 4 Banks Synchronous DRAM |
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