參數(shù)資料
型號(hào): M12L2561616A-6BG
廠商: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
元件分類(lèi): DRAM
英文描述: 4M x 16 Bit x 4 Banks Synchronous DRAM
中文描述: 16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54
封裝: 8 X 13 MM, LEAD FREE, BGA-54
文件頁(yè)數(shù): 41/44頁(yè)
文件大?。?/td> 908K
代理商: M12L2561616A-6BG
ES MT
Mode Register Set Cycle
M12L2561616A
Elite Semiconductor Memory Technology Inc.
Revision
:
1.2
Publication Date
:
Aug. 2007
41/44
Auto Refresh Cycle
All banks precharge should be completed before Mode Register Set cycle and auto refresh cycle.
MODE REGISTER SET CYCLE
*Note : 1. CS , RAS , CAS , &
WE
activation at the same clock cycle with address key will set internal mode register.
2. Minimum 2 clock cycles should be met before new RAS activation.
3. Please refer to Mode Register Set table.
C L O C K
C K E
C S
R A S
C A S
A D D R
W E
DQ
DQ M
:Don't Car e
HIGH
0 1 2 3 4 5 6
0 1 2 3 4 5 6 7 8 9 10
HIGH
Key
Ra
HI-Z
HI-Z
*Not e 2
* Not e 1
*Not e 3
t
R F C
MR S
New
Command
Auto Refresh
New Command
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M12L2561616A-6BG2K 制造商:ESMT 制造商全稱(chēng):Elite Semiconductor Memory Technology Inc. 功能描述:JEDEC standard 3.3V power supply
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M12L2561616A-6TG 制造商:ESMT 制造商全稱(chēng):Elite Semiconductor Memory Technology Inc. 功能描述:4M x 16 Bit x 4 Banks Synchronous DRAM
M12L2561616A-6TG2K 制造商:ESMT 制造商全稱(chēng):Elite Semiconductor Memory Technology Inc. 功能描述:JEDEC standard 3.3V power supply
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