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參數(shù)資料
| 型號： | M12L128324A-7TG |
| 廠商： | ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | 1M x 32 Bit x 4 Banks Synchronous DRAM |
| 中文描述： | 4M X 32 SYNCHRONOUS DRAM, 6 ns, PDSO86 |
| 封裝： | 0.400 INCH, LEAD FREE, TSOP2-86 |
| 文件頁數(shù)： | 28/47頁 |
| 文件大?。?/td> | 794K |
| 代理商： | M12L128324A-7TG |
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ES MT
M12L128324A
Elite Semiconductor Memory Technology Inc.
Publication Date: Mar. 2006
Revision
:
1.2
28/47
Current
State
Precharging
CS
RAS
CAS
WE
BA
ADDR
ACTION
Note
H
L
L
L
L
L
L
H
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
L
X
H
H
H
L
L
L
X
H
H
H
L
L
L
X
H
H
L
L
X
H
H
H
L
X
H
H
L
H
H
L
X
H
H
L
H
H
L
X
H
L
H
L
X
H
H
L
X
X
H
L
X
H
L
X
X
H
L
X
H
L
X
X
X
X
X
X
X
H
L
X
X
X
X
X
BA
BA
BA
X
X
X
X
BA
BA
BA
X
X
X
X
X
X
X
X
X
X
X
X
X
X
CA
RA
NOP
Idle after t
RP
NOP
Idle after t
RP
ILLEGAL
ILLEGAL
ILLEGAL
NOP
Idle after t
RDL
ILLEGAL
NOP
Row Active after t
RCD
NOP
Row Active after t
RCD
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
NOP
Idle after t
RC
NOP
Idle after t
RC
ILLEGAL
ILLEGAL
ILLEGAL
NOP
Idle after 2clocks
NOP
Idle after 2clocks
ILLEGAL
ILLEGAL
ILLEGAL
2
2
2
4
2
2
2
2
A10/AP
X
X
X
X
CA
RA
A10/AP
X
X
X
X
X
X
X
X
X
X
X
Row
Activating
Refreshing
Mode
Register
Accessing
Abbreviations :
RA = Row Address
NOP = No Operation Command
BA = Bank Address
CA = Column Address
AP = Auto Precharge
*Note : 1. All entries assume the CKE was active (High) during the precharge clock and the current clock cycle.
2. Illegal to bank in specified state ; Function may be legal in the bank indicated by BA, depending on the state of the
bank.
3. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
4. NOP to bank precharge or in idle state. May precharge bank indicated by BA (and A10/AP).
5. Illegal if any bank is not idle.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M12L128324A | 1M x 32 Bit x 4 Banks Synchronous DRAM |
| M12L128324A-6BG | 1M x 32 Bit x 4 Banks Synchronous DRAM |
| M12L128324A-6TG | 1M x 32 Bit x 4 Banks Synchronous DRAM |
| M12L16161A-5TG | 512K x 16Bit x 2Banks Synchronous DRAM |
| M12L16161A-7BG | 512K x 16Bit x 2Banks Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M12L128324A-7TIG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Synchronous DRAM |
| M12L16161A | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
| M12L16161A_05 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
| M12L16161A_08 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
| M12L16161A_1 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
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