參數(shù)資料
型號(hào): M12L128324A-7BG
廠商: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
元件分類(lèi): DRAM
英文描述: 1M x 32 Bit x 4 Banks Synchronous DRAM
中文描述: 4M X 32 SYNCHRONOUS DRAM, 6 ns, PBGA90
封裝: 13 X 8 MM, LEAD FREE, FBGA-90
文件頁(yè)數(shù): 42/47頁(yè)
文件大小: 794K
代理商: M12L128324A-7BG
ES MT
M12L128324A
Elite Semiconductor Memory Technology Inc.
Publication Date: Mar. 2006
Revision
:
1.2
42/47
Active/Precharge Power Down Mode @ CAS Latency = 2, Burst Length = 4
0 1 2 3 4 5 6 7 8 9
*Note: 1. Both banks should be in idle state prior to entering precharge power down mode.
2. CKE should be set high at least 1CLK + t
SS
prior to Row active command.
C L O C K
C K E
C S
R A S
C A S
A D D R
W E
DQ
DQ M
A10/AP
BA0
A c t i v e
P o w er - d o w n
E xi t
P r e c h a r g e
: D o n ' t c a r e
*N ot e 3
* No t e 2
* No t e 1
t
S S
t
S S
t
S S
Ra
Ra
Qa0
Qa1
Qa2
t
S H Z
Precharge
Power-Down
Entry
Precharge
Power-Down
Exit
Row Active
Active
Power-down
Entry
Read
10 11 12 13 14 15 16 17 18 19
Ca
BA1
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M12L128324A-7BG2E 制造商:ESMT 制造商全稱(chēng):Elite Semiconductor Memory Technology Inc. 功能描述:JEDEC standard 3.3V power supply
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M12L128324A-7TG 制造商:ESMT 制造商全稱(chēng):Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Synchronous DRAM
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