參數(shù)資料
型號(hào): M12L128168A-5TG
廠商: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
元件分類(lèi): DRAM
英文描述: 2M x 16 Bit x 4 Banks Synchronous DRAM
中文描述: 8M X 16 SYNCHRONOUS DRAM, 4.5 ns, PDSO54
封裝: 0.400 INCH, LEAD FREE, TSOP2-54
文件頁(yè)數(shù): 15/43頁(yè)
文件大小: 804K
代理商: M12L128168A-5TG
ESMT
Self refresh entry command
(CS ,RAS ,CAS , CKE = Low ,
WE
= High)
After the command execution, self refresh operation continues while CKE
remains low. When CKE goes to high, the M12L128168A exits the self refresh mode.
During self refresh mode, refresh interval and refresh operation are performed
internally, so there is no need for external control.
Before executing self refresh, all banks must be precharged.
Burst stop command
(CS ,
WE
= Low,RAS ,CAS = High)
This command terminates the current burst operation.
Burst stop is valid at every burst length.
No operation
(CS = Low ,RAS ,CAS ,
WE
= High)
This command is not a execution command. No operations begin or terminate by
this command.
M12L128168A
Elite Semiconductor Memory Technology Inc.
Revision
:
2.0
Publication Date
:
Oct. 2006
15/43
CLK
CKE
CS
RAS
WE
A12, A13
(Bank select)
A10
Add
CAS
CLK
CKE
CS
RAS
WE
A12, A13
(Bank select)
A10
Add
CAS
H
Fig. 7 Self refresh entry
command
Fig. 8 Burst stop command
CLK
CKE
CS
RAS
WE
A12, A13
(Bank select)
A10
Add
CAS
H
Fig. 9 No operation
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M12L128168A-6BG2L 制造商:ESMT 制造商全稱(chēng):Elite Semiconductor Memory Technology Inc. 功能描述:ABSOLUTE MAXIMUM RATINGS
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