- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄180051 > M-ORSO82G51BM680-DB (LATTICE SEMICONDUCTOR CORP) FPGA, 1296 CLBS, 333000 GATES, PBGA680 PDF資料下載
參數(shù)資料
| 型號(hào)： | M-ORSO82G51BM680-DB |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 1296 CLBS, 333000 GATES, PBGA680 |
| 封裝： | PLASTIC, FBGA-680 |
| 文件頁數(shù)： | 57/123頁 |
| 文件大?。?/td> | 2207K |
| 代理商： | M-ORSO82G51BM680-DB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁當(dāng)前第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁
Lattice Semiconductor
ORCA ORSO82G5 Data Sheet
39
the common clock. The input to the FIFO consists of 32-bit data and a frame pulse that indicates the start of a
frame (or A1A2 framing bytes). This frame pulse is used to synchronize multiple channels within an alignment
group.
If a channel is not in any alignment group, the FIFO control logic will set the FIFO-write-address to the beginning of
the FIFO, and will set the FIFO-read-address to the middle of the FIFO at the rst assertion of frame pulse after
reset or after the resync command.
The RX_FIFO_MIN register bits can be used to control the threshold for minimum unused buffer space in the align-
ment FIFOs between read and write pointers before OVFL status is agged. The synchronization algorithm con-
sists of a down counter which starts to count down by 1 from its initial value of 18 (decimal) when a frame pulse
from any channel within an alignment group has been received. The OOS alarm indicates the FIFO is out-of sync
and the channel skew exceeds that which can be handled by the FIFO. Once the frame pulse for all channels within
the alignment group have been received, the count is decremented by 2 until 0 is reached. Data are then read from
the FIFOs and output to the SPE generator before being sent to the FPGA.
For every alignment group, there is an OVFL and OOS status register bit. The OOS bit is agged when the down
counter in the synchronization algorithm has reached a value of 0 and frame pulse from all channels within an
alignment group have not been received. The OVFL bit is agged when the read address at the time of receiving a
frame pulse, is less than the minimum threshold set by RX_FIFO_MIN. In the memory map section OOS is referred
to as SYNC[2,4]_[A1,A2,B1,B2]_OOS, SYNC8_OOS. OVFL is referred to as SYNC[2,4]_[A1,A2,B1,B2]_OVFL,
SYNC8_OVFL.
Receive Clocking for Multi-channel Alignment
There are a total of nine clocks for the receive path, from FPGA to the core. The four used in SONET mode are
RSYSCLKA1 and RSYSCLKA2 (both for quad A), and RSYSCLKB1 and RSYSCLKB2 (both for quad B). The fol-
lowing diagrams show the recommended clock distribution approaches for SONET mode multi-channel alignment
modes. Cell mode alignment is discussed in the section describing the Input Port Controller (IPC).)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M-ORSO82G52BM680-DB | FPGA, 1296 CLBS, 333000 GATES, PBGA680 |
| M-ORT82G51BM680-DB | FPGA, 1296 CLBS, 333000 GATES, PBGA680 |
| M-ORT82G52BM680-DB | FPGA, 1296 CLBS, 333000 GATES, PBGA680 |
| M.PI-1R1D12 | 1 ELEMENT, 1.1 uH, GENERAL PURPOSE INDUCTOR, SMD |
| M01-014-1452PA | 14 CONTACT(S), MALE, RIGHT ANGLE TELECOM AND DATACOM CONNECTOR, SOLDER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MORTAR-44LB | 制造商:3M Electronic Products Division 功能描述:3M(TM) FIRE BARRIER MORTAR, 44 98040056073 制造商:3M Electronic Products Division 功能描述:Fire Barrier 44 lb Bag |
| MO-RX3930 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FSK RECEIVER MODULE |
| MO-RX3930-FS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FSK RECEIVER MODULE |
| MO-RX3930-FS315M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FSK RECEIVER MODULE |
| MO-RX3930-FS434M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FSK RECEIVER MODULE |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。