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參數(shù)資料
| 型號： | LZ85194 |
| 廠商： | Sharp Corporation |
| 英文描述： | IrDA Control Peripheral Engine(IrDA 控制外圍處理器) |
| 中文描述： | 紅外線控制周邊引擎（紅外線控制外圍處理器） |
| 文件頁數(shù)： | 35/76頁 |
| 文件大?。?/td> | 256K |
| 代理商： | LZ85194 |
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LZ85194
IrDA Control Peripheral Engine User
’
s Guide
29
Get_Status
In the event that obtained MID by Get_Message Command is 27H,and 2 bytes that follows
on MID (ReportId, ReportType) are 00H and F0H, it is an inquiry for the power supply bat-
tery status. Use Set_Peripheral_Info(7) and reply in the format provided in Table 20.
Signal Lines
Table 20. Reply for Power Supply Battery Status Inquiry
POWER SUPPLY
VOLTAGE
DESCRIPTION
00H
01H
02H
Normal
No fatal problem for operation, but changing batteries is recommended.
Batteries are in fatal level for operation. Batteries need to be changed immediately.
SIGNAL
I/O
DESCRIPTION
SI
Input
Serial data input. In issuing Commands, each bit of Command should be output from the μP, syn-
chronizing with the falling edge of SCK. SI = H for data = 1, SI = L for data = 0 should be output.
SO
Output
Serial data output. For the Commands that call for a PE response, PE outputs its response fol-
lowing one byte of Command. The μP must read in the contents of SO at the rising edge of SCK.
PE outputs SO = H for data = 1, SO = L for data = 0.
SCK
Input
Clock signal for serial data. The μP must supply the clock signal. Normally SCK is configured at
SCK = H (clock operation stops). Only in issuing Commands and PE response, SCK changes
as H
→
L
→
H. PE will read in each bit of Command (SI) at the rising edge of SCK. In responding,
PE outputs each bit of its response (SO) at the falling edge of SCK. To stop the clock operation
of SCK, it must be stopped by the serial data byte. SCK must be fixed at SCK = H when the last
bit of current proceeding byte (output or input) via serial data lines is completed. When the hard-
ware reset is to cancel, it must be H. Noise effect on SCK may prevent PE from counting the
clock properly, and cause PE to stall, keeping RDY remain L level. An appropriate counter- mea-
sure to the noise, such as strengthen the power supply, should be made.
MSG
Output
MSG = H indicates that PE holds Messages. The μP must issue Get_Message Command and
read in the Message. When PE no longer holds Messages, PE outputs MSG = L.
RDY
Output
Signal for flow control. Whenever the next one byte can be read/write via SD signal line, PE out-
puts RDY = H. The μP must check the status of RDY when the last bit of current proceeding byte
is output (or input). When RDY = L, stop clock operation of SCK (fix SCK = H) and wait for RDY
to become RDY = H.
CMD
Input
Timing signal for Command ID. The μP must set CMD to H before outputting D7 bit of Command
ID to SI. After outputting D0 bit of Command ID, wait for RDY to be RDY = H and set CMD to
CMD = L.
IRTx
Output
Connected to TXD pinout of Infrared Transceiver (P/N: GP2W2001/2002YK).
IRRx1
Input
Connected to V
O
pinout of Infrared Transceiver (P/N: GPW2001/2002YK).
Connect to GND. Reserved for the future extension.
IRRx2
Input
IRTxBIAS
Output
Connect to LEDA and of pinouts of Infrared Transceiver (P/N: GP2W2001/2002YK) via
DC BIAS circuit.
FECNT
Output
Connected to SD pinout of Infrared Transceiver (P/N: GP2W2001/2002YK).
FERESET
Output
Connected to Reset pinout of Infrared Transceiver (P/N: GP2W2001/2002YK).
X1
X2
Input
Output
Crystal input and output. Clock of 6 MHz must be applied. Crystal and Capacitors should be
located nearby LSI.
RESETB
Input
Hardware reset signal.
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